linux-kernel - Re: [PATCH v4 03/12] KVM: arm64: guest debug, define API headers

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Message-ID: <CAFEAcA8ZpndRyT84ta2r4bPTE1uGTN1XTfMpUn8qW022ben3BQ@mail.gmail.com>
Date:	Fri, 15 May 2015 16:17:46 +0100
From:	Peter Maydell <peter.maydell@...aro.org>
To:	Alex Bennée <alex.bennee@...aro.org>
Cc:	Mark Rutland <mark.rutland@....com>,
	"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"kvmarm@...ts.cs.columbia.edu" <kvmarm@...ts.cs.columbia.edu>,
	"christoffer.dall@...aro.org" <christoffer.dall@...aro.org>,
	Marc Zyngier <Marc.Zyngier@....com>,
	"agraf@...e.de" <agraf@...e.de>,
	"drjones@...hat.com" <drjones@...hat.com>,
	"pbonzini@...hat.com" <pbonzini@...hat.com>,
	"zhichao.huang@...aro.org" <zhichao.huang@...aro.org>,
	Catalin Marinas <Catalin.Marinas@....com>,
	"jan.kiszka@...mens.com" <jan.kiszka@...mens.com>,
	Will Deacon <Will.Deacon@....com>,
	open list <linux-kernel@...r.kernel.org>,
	"dahi@...ux.vnet.ibm.com" <dahi@...ux.vnet.ibm.com>,
	"r65777@...escale.com" <r65777@...escale.com>,
	"bp@...e.de" <bp@...e.de>
Subject: Re: [PATCH v4 03/12] KVM: arm64: guest debug, define API headers

On 15 May 2015 at 16:14, Alex Bennée <alex.bennee@...aro.org> wrote:
>
> Mark Rutland <mark.rutland@....com> writes:
>
>> On Fri, May 15, 2015 at 03:27:06PM +0100, Alex Bennée wrote:
>>> +/*
>>> + * See v8 ARM ARM D7.3: Debug Registers
>>> + *
>>> + * The control registers are architecturally defined as 32 bits but are
>>> + * stored as 64 bit values alongside the value registers. This is done
>>
>> Stale comment? They're stored as __u32 below.
>
> Gah yes it is.
>
>> It's possible that the registers could grow in future as happened in the
>> case of CLIDR_EL1, so it might be worth treating system registers
>> generally as u64 values.
>
> Really? I mean the existing debug *control* registers have reserved bits
> 24-31 so there is space for expansion.

Other places in the userspace ABI which deal with sysregs (notably
ONE_REG) consistently define them all as 64-bit (which makes sense
anyway since the ISA only provides 64-bit accessors to them).
"Architecturally 32 bits" only means "top 32 bits reserved".

-- PMM
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