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Message-Id: <1431786833-25487-4-git-send-email-sasha.levin@oracle.com>
Date: Sat, 16 May 2015 10:33:12 -0400
From: Sasha Levin <sasha.levin@...cle.com>
To: stable@...r.kernel.org, stable-commits@...r.kernel.org
Cc: Chandrakala Chavva <cchavva@...iumnetworks.com>,
Aleksey Makarov <aleksey.makarov@...iga.com>,
David Daney <david.daney@...ium.com>,
linux-mips@...ux-mips.org, linux-kernel@...r.kernel.org,
Ralf Baechle <ralf@...ux-mips.org>,
Sasha Levin <sasha.levin@...cle.com>
Subject: [added to the 3.18 stable tree] MIPS: OCTEON: Use correct CSR to soft reset
From: Chandrakala Chavva <cchavva@...iumnetworks.com>
This patch has been added to the 3.18 stable tree. If you have any
objections, please let us know.
===============
[ Upstream commit fe2360f8f505ea8340f710f1c80a8f56462bdd62 ]
This fixes reboot for Octeon III boards
[ralf@...ux-mips.org: Dropped segment for function cvmx_reset_octeon()
which was removed by the preceeding commit.]
Signed-off-by: Chandrakala Chavva <cchavva@...iumnetworks.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@...iga.com>
Cc: David Daney <david.daney@...ium.com>
Cc: linux-mips@...ux-mips.org
Cc: linux-kernel@...r.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9464/
Signed-off-by: Ralf Baechle <ralf@...ux-mips.org>
Signed-off-by: Sasha Levin <sasha.levin@...cle.com>
---
arch/mips/cavium-octeon/setup.c | 5 ++++-
arch/mips/include/asm/octeon/cvmx.h | 8 --------
2 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 5ebdb32..de9b625 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -412,7 +412,10 @@ static void octeon_restart(char *command)
mb();
while (1)
- cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);
+ if (OCTEON_IS_OCTEON3())
+ cvmx_write_csr(CVMX_RST_SOFT_RST, 1);
+ else
+ cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);
}
diff --git a/arch/mips/include/asm/octeon/cvmx.h b/arch/mips/include/asm/octeon/cvmx.h
index f991e77..f5ca449 100644
--- a/arch/mips/include/asm/octeon/cvmx.h
+++ b/arch/mips/include/asm/octeon/cvmx.h
@@ -436,14 +436,6 @@ static inline uint64_t cvmx_get_cycle_global(void)
/***************************************************************************/
-static inline void cvmx_reset_octeon(void)
-{
- union cvmx_ciu_soft_rst ciu_soft_rst;
- ciu_soft_rst.u64 = 0;
- ciu_soft_rst.s.soft_rst = 1;
- cvmx_write_csr(CVMX_CIU_SOFT_RST, ciu_soft_rst.u64);
-}
-
/* Return the number of cores available in the chip */
static inline uint32_t cvmx_octeon_num_cores(void)
{
--
2.1.0
--
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