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Message-ID: <tip-2d9f59f7bf8ef5704b0b6ca8406be12568a1c2da@git.kernel.org>
Date: Mon, 18 May 2015 08:37:26 -0700
From: tip-bot for Stefan Agner <tipbot@...or.com>
To: linux-tip-commits@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, tglx@...utronix.de, stefan@...er.ch,
hpa@...or.com, mingo@...nel.org
Subject: [tip:irq/core] irqchip: nvic: Support hierarchy irq domain
Commit-ID: 2d9f59f7bf8ef5704b0b6ca8406be12568a1c2da
Gitweb: http://git.kernel.org/tip/2d9f59f7bf8ef5704b0b6ca8406be12568a1c2da
Author: Stefan Agner <stefan@...er.ch>
AuthorDate: Sat, 16 May 2015 11:44:16 +0200
Committer: Thomas Gleixner <tglx@...utronix.de>
CommitDate: Mon, 18 May 2015 17:32:44 +0200
irqchip: nvic: Support hierarchy irq domain
Add support for hierarchy irq domains. This is required to stack
the MSCM interrupt router and the NVIC controller found in Vybrid
SoC.
Signed-off-by: Stefan Agner <stefan@...er.ch>
Cc: marc.zyngier@....com
Cc: linux@....linux.org.uk
Cc: u.kleine-koenig@...gutronix.de
Cc: olof@...om.net
Cc: arnd@...db.de
Cc: daniel.lezcano@...aro.org
Cc: mark.rutland@....com
Cc: pawel.moll@....com
Cc: robh+dt@...nel.org
Cc: ijc+devicetree@...lion.org.uk
Cc: galak@...eaurora.org
Cc: mcoquelin.stm32@...il.com
Cc: linux-arm-kernel@...ts.infradead.org
Cc: shawn.guo@...aro.org
Cc: kernel@...gutronix.de
Cc: jason@...edaemon.net
Link: http://lkml.kernel.org/r/1431769465-26867-5-git-send-email-stefan@agner.ch
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
---
drivers/irqchip/Kconfig | 1 +
drivers/irqchip/irq-nvic.c | 28 +++++++++++++++++++++++++++-
2 files changed, 28 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 6de62a9..99b9a97 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -30,6 +30,7 @@ config ARM_GIC_V3_ITS
config ARM_NVIC
bool
select IRQ_DOMAIN
+ select IRQ_DOMAIN_HIERARCHY
select GENERIC_IRQ_CHIP
config ARM_VIC
diff --git a/drivers/irqchip/irq-nvic.c b/drivers/irqchip/irq-nvic.c
index 4ff0805..5fac910 100644
--- a/drivers/irqchip/irq-nvic.c
+++ b/drivers/irqchip/irq-nvic.c
@@ -49,6 +49,31 @@ nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs)
handle_IRQ(irq, regs);
}
+static int nvic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ int i, ret;
+ irq_hw_number_t hwirq;
+ unsigned int type = IRQ_TYPE_NONE;
+ struct of_phandle_args *irq_data = arg;
+
+ ret = irq_domain_xlate_onecell(domain, irq_data->np, irq_data->args,
+ irq_data->args_count, &hwirq, &type);
+ if (ret)
+ return ret;
+
+ for (i = 0; i < nr_irqs; i++)
+ irq_map_generic_chip(domain, virq + i, hwirq + i);
+
+ return 0;
+}
+
+static const struct irq_domain_ops nvic_irq_domain_ops = {
+ .xlate = irq_domain_xlate_onecell,
+ .alloc = nvic_irq_domain_alloc,
+ .free = irq_domain_free_irqs_top,
+};
+
static int __init nvic_of_init(struct device_node *node,
struct device_node *parent)
{
@@ -70,7 +95,8 @@ static int __init nvic_of_init(struct device_node *node,
irqs = NVIC_MAX_IRQ;
nvic_irq_domain =
- irq_domain_add_linear(node, irqs, &irq_generic_chip_ops, NULL);
+ irq_domain_add_linear(node, irqs, &nvic_irq_domain_ops, NULL);
+
if (!nvic_irq_domain) {
pr_warn("Failed to allocate irq domain\n");
return -ENOMEM;
--
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