linux-kernel - Re: [PATCH 1/1] clk: tegra: read correct iddq register in PLL

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Message-ID: <CANLzEkto_rDBvyM0ra4ymaT-L9q1DxBqKgzxy2GEYKEE9KDuuQ@mail.gmail.com>
Date:	Mon, 18 May 2015 09:53:14 -0700
From:	Benson Leung <bleung@...omium.org>
To:	Bill Huang <bilhuang@...dia.com>
Cc:	Peter De Schrijver <pdeschrijver@...dia.com>,
	Mike Turquette <mturquette@...aro.org>,
	Stephen Warren <swarren@...dotorg.org>,
	Thierry Reding <thierry.reding@...il.com>,
	Paul Walmsley <pwalmsley@...dia.com>,
	Rhyland Klein <rklein@...dia.com>, linux-clk@...r.kernel.org,
	linux-tegra@...r.kernel.org,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/1] clk: tegra: read correct iddq register in PLL_SS registration

On Mon, May 18, 2015 at 4:03 AM, Bill Huang <bilhuang@...dia.com> wrote:
> This fixes bug in tegra_clk_register_pllss() which mistakenly assume the
> iddq register is the PLL base address.
>
> Signed-off-by: Bill Huang <bilhuang@...dia.com>

Thanks for the quick fix.
Reviewed-by: Benson Leung <bleung@...omium.org>

-- 
Benson Leung
Software Engineer, Chrom* OS
bleung@...omium.org
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