| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <7F8B0480-06A8-4381-90C8-3F2A35F14FCD@codeaurora.org>
Date: Mon, 18 May 2015 13:52:40 -0500
From: Kumar Gala <galak@...eaurora.org>
To: Mathieu Poirier <mathieu.poirier@...aro.org>
Cc: "Ivan T. Ivanov" <ivan.ivanov@...aro.org>,
Pratik Patel <pratikp@...eaurora.org>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH v3] arm64: dts: qcom: Add msm8916 CoreSight components
> On May 11, 2015, at 2:21 PM, Mathieu Poirier <mathieu.poirier@...aro.org> wrote:
>
> On 11 May 2015 at 02:31, Ivan T. Ivanov <ivan.ivanov@...aro.org> wrote:
>> Add initial set of CoreSight components found on Qualcomm's 8x16 chipset.
>>
>> Signed-off-by: Ivan T. Ivanov <ivan.ivanov@...aro.org>
>> ---
>>
>> Changes since v2 [1]:
>> * Added "1x" to "qcom,coresight-replicator" compatible string, to match what
>> devicetree bindings documentations says.
>>
>> [1] http://www.spinics.net/lists/devicetree/msg77768.html
>>
>> arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi | 254 ++++++++++++++++++++++++
>> 1 file changed, 254 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
>> new file mode 100644
>> index 0000000..900f1f4
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
>> @@ -0,0 +1,254 @@
>> +/*
>> + * Copyright (c) 2013 - 2015, The Linux Foundation. All rights reserved.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 and
>> + * only version 2 as published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +&soc {
>> +
>> + tpiu@...000 {
>> + compatible = "arm,coresight-tpiu", "arm,primecell";
>> + reg = <0x820000 0x1000>;
>> +
>> + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
>> + clock-names = "apb_pclk", "atclk";
>> +
>> + port {
>> + tpiu_in: endpoint {
>> + slave-mode;
>> + remote-endpoint = <&replicator_out1>;
>> + };
>> + };
>> + };
>> +
>> + funnel@...000 {
>> + compatible = "arm,coresight-funnel", "arm,primecell";
>> + reg = <0x821000 0x1000>;
>> +
>> + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
>> + clock-names = "apb_pclk", "atclk";
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + /*
>> + * Not described input ports:
>> + * 0 - connected to Resource and Power Manger CPU ETM
>> + * 1 - not-connected
>> + * 2 - connected to Modem CPU ETM
>> + * 3 - not-connected
>> + * 5 - not-connected
>> + * 6 - connected trought funnel to Wireless CPU ETM
>> + * 7 - connected to STM component
>> + */
>> + port@4 {
>> + reg = <4>;
>> + funnel0_in4: endpoint {
>> + slave-mode;
>> + remote-endpoint = <&funnel1_out>;
>> + };
>> + };
>> + port@8 {
>> + reg = <0>;
>> + funnel0_out: endpoint {
>> + remote-endpoint = <&etf_in>;
>> + };
>> + };
>> + };
>> + };
>> +
>> + replicator@...000 {
>> + compatible = "qcom,coresight-replicator1x", "arm,primecell";
>> + reg = <0x824000 0x1000>;
>> +
>> + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
>> + clock-names = "apb_pclk", "atclk";
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> + replicator_out0: endpoint {
>> + remote-endpoint = <&etr_in>;
>> + };
>> + };
>> + port@1 {
>> + reg = <1>;
>> + replicator_out1: endpoint {
>> + remote-endpoint = <&tpiu_in>;
>> + };
>> + };
>> + port@2 {
>> + reg = <0>;
>> + replicator_in: endpoint {
>> + slave-mode;
>> + remote-endpoint = <&etf_out>;
>> + };
>> + };
>> + };
>> + };
>> +
>> + etf@...000 {
>> + compatible = "arm,coresight-tmc", "arm,primecell";
>> + reg = <0x825000 0x1000>;
>> +
>> + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
>> + clock-names = "apb_pclk", "atclk";
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> + etf_out: endpoint {
>> + slave-mode;
>> + remote-endpoint = <&funnel0_out>;
>> + };
>> + };
>> + port@1 {
>> + reg = <0>;
>> + etf_in: endpoint {
>> + remote-endpoint = <&replicator_in>;
>> + };
>> + };
>> + };
>> + };
>> +
>> + etr@...000 {
>> + compatible = "arm,coresight-tmc", "arm,primecell";
>> + reg = <0x826000 0x1000>;
>> +
>> + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
>> + clock-names = "apb_pclk", "atclk";
>> +
>> + port {
>> + etr_in: endpoint {
>> + slave-mode;
>> + remote-endpoint = <&replicator_out0>;
>> + };
>> + };
>> + };
>> +
>> + funnel@...000 { /* APSS funnel only 4 inputs are used */
>> + compatible = "arm,coresight-funnel", "arm,primecell";
>> + reg = <0x841000 0x1000>;
>> +
>> + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
>> + clock-names = "apb_pclk", "atclk";
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> + funnel1_in0: endpoint {
>> + slave-mode;
>> + remote-endpoint = <&etm0_out>;
>> + };
>> + };
>> + port@1 {
>> + reg = <1>;
>> + funnel1_in1: endpoint {
>> + slave-mode;
>> + remote-endpoint = <&etm1_out>;
>> + };
>> + };
>> + port@2 {
>> + reg = <2>;
>> + funnel1_in2: endpoint {
>> + slave-mode;
>> + remote-endpoint = <&etm2_out>;
>> + };
>> + };
>> + port@3 {
>> + reg = <3>;
>> + funnel1_in3: endpoint {
>> + slave-mode;
>> + remote-endpoint = <&etm3_out>;
>> + };
>> + };
>> + port@4 {
>> + reg = <0>;
>> + funnel1_out: endpoint {
>> + remote-endpoint = <&funnel0_in4>;
>> + };
>> + };
>> + };
>> + };
>> +
>> + etm@...000 {
>> + compatible = "arm,coresight-etm4x", "arm,primecell";
>> + reg = <0x85c000 0x1000>;
>> +
>> + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
>> + clock-names = "apb_pclk", "atclk";
>> +
>> + cpu = <&CPU0>;
>> +
>> + port {
>> + etm0_out: endpoint {
>> + remote-endpoint = <&funnel1_in0>;
>> + };
>> + };
>> + };
>> +
>> + etm@...000 {
>> + compatible = "arm,coresight-etm4x", "arm,primecell";
>> + reg = <0x85d000 0x1000>;
>> +
>> + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
>> + clock-names = "apb_pclk", "atclk";
>> +
>> + cpu = <&CPU1>;
>> +
>> + port {
>> + etm1_out: endpoint {
>> + remote-endpoint = <&funnel1_in1>;
>> + };
>> + };
>> + };
>> +
>> + etm@...000 {
>> + compatible = "arm,coresight-etm4x", "arm,primecell";
>> + reg = <0x85e000 0x1000>;
>> +
>> + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
>> + clock-names = "apb_pclk", "atclk";
>> +
>> + cpu = <&CPU2>;
>> +
>> + port {
>> + etm2_out: endpoint {
>> + remote-endpoint = <&funnel1_in2>;
>> + };
>> + };
>> + };
>> +
>> + etm@...000 {
>> + compatible = "arm,coresight-etm4x", "arm,primecell";
>> + reg = <0x85f000 0x1000>;
>> +
>> + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
>> + clock-names = "apb_pclk", "atclk";
>> +
>> + cpu = <&CPU3>;
>> +
>> + port {
>> + etm3_out: endpoint {
>> + remote-endpoint = <&funnel1_in3>;
>> + };
>> + };
>> + };
>> +};
>> --
>> 1.9.1
>>
>
> Kumar, I'm happy with this DT specification for Coresight. Since I'm
> taking the driver it would likely make more sense for this to go
> through my tree. Could you please have a look and give me your ack?
It looks ok, however I don’t see us including this file anywhere, so that’s my only concern.
- k
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists