linux-kernel - Re: Mwait usage on AMD processors

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Date:	Tue, 19 May 2015 10:50:17 +0200
From:	Borislav Petkov <bp@...en8.de>
To:	Huang Rui <ray.huang@....com>
Cc:	Len Brown <lenb@...nel.org>,
	"Rafael J. Wysocki" <rjw@...ysocki.net>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Fengguang Wu <fengguang.wu@...el.com>,
	Aaron Lu <aaron.lu@...el.com>, "Li, Tony" <Tony.Li@....com>,
	Thomas Gleixner <tglx@...utronix.de>
Subject: Re: Mwait usage on AMD processors

On Tue, May 19, 2015 at 03:25:53PM +0800, Huang Rui wrote:
> Apology that cause to misunderstand. It's not as same as intel.
> Intel is able to go to C1E like you said, the C1E has less power
> consumption than C1 on Intel platform.

You still misunderstand - I'm not talking about Intel platforms here but
AMD ones. On AMD we never enter idle with MWAIT - we do HLT which enters
C1 and then the hw enters C1E when a bunch of conditions are fulfilled.

> The faster waiting exit speed. But it's hard to test the improvement,
> do you have any idea? It's told by HW designer.

You can test the improvement with a special setup only. Unless you can
read out power consumption of a box while it is idle.

The exit-idle speed only does not suffice to switch to MWAIT though,
IMHO. I think power consumption in idle should be the relevant metric
here.

> Current CPU, power consumption cannot go to deeper low power state
> (C1) via mwaitx/mwait. But HW designers will implement it in future
> processors.

So future CPUs we will switch to MWAIT. I don't see a problem with that.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.
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