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Message-ID: <20150519091755.GC17401@codeblueprint.co.uk>
Date: Tue, 19 May 2015 10:17:55 +0100
From: Matt Fleming <matt@...eblueprint.co.uk>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: LKML <linux-kernel@...r.kernel.org>,
Peter Zijlstra <peterz@...radead.org>,
Vikas Shivappa <vikas.shivappa@...ux.intel.com>,
x86@...nel.org, Matt Fleming <matt.fleming@...el.com>,
Will Auld <will.auld@...el.com>,
Kanaka Juvva <kanaka.d.juvva@...el.com>
Subject: Re: [patch 4/6] x86, perf, cqm: Avoid pointless msr write
On Tue, 19 May, at 12:00:55AM, Thomas Gleixner wrote:
> If the usage counter is non-zero there is no point to update the rmid
> in the PQR MSR.
>
> Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
> ---
> arch/x86/kernel/cpu/perf_event_intel_cqm.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
Good catch.
Acked-by: Matt Fleming <matt.fleming@...el.com>
--
Matt Fleming, Intel Open Source Technology Center
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