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Message-ID: <CACRpkdaJqr87B8FTEcw93Q=oELvFJ77w=Me-Wo5SwLD8R655_w@mail.gmail.com>
Date:	Tue, 19 May 2015 17:01:16 +0200
From:	Linus Walleij <linus.walleij@...aro.org>
To:	Marc Zyngier <marc.zyngier@....com>
Cc:	Feng Kan <fkan@....com>,
	Abhijeet Dharmapurikar <adharmap@...eaurora.org>,
	Stephen Boyd <sboyd@...eaurora.org>, Phong Vo <pvo@....com>,
	Tin Huynh <tnhuynh@....com>, Y Vo <yvo@....com>,
	Thomas Gleixner <tglx@...utronix.de>, Toan Le <toanle@....com>,
	Bjorn Andersson <bjorn@...o.se>,
	Jason Cooper <jason@...edaemon.net>,
	Arnd Bergmann <arnd@...db.de>,
	linux-arm-msm <linux-arm-msm@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	Alexandre Courbot <gnurou@...il.com>
Subject: Re: [PATCH v4 2/3] irqchip: GIC: Add support for irq_{get,set}_irqchip_state

On Tue, May 19, 2015 at 12:01 PM, Marc Zyngier <marc.zyngier@....com> wrote:

> If reading the pending state doesn't work, then I'd like to know
> exactly *why*. Only then we can add support for LINE_LEVEL using SPISR
> (which has to be GIC-400 specific, as it is not architected).

That's a good point. Is it one of these usual cases of hardware
thrown over the wall and the HW engineer mostly yawning or
rolling his eyes if we ask things like this?

Or is there someone who can actually answer the call?

Yours,
Linus Walleij
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