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Date:	Thu, 21 May 2015 00:41:09 +0530
From:	Jagan Teki <jteki@...nedev.com>
To:	dmaengine@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, Jagan Teki <jteki@...nedev.com>,
	Dan Williams <dan.j.williams@...el.com>,
	Vinod Koul <vinod.koul@...el.com>
Subject: [PATCH 1/2] dma: omap-dma: Fix line over 80 characters

This patch fixes line over 80 characters warninings while
running checkpatch.pl

Signed-off-by: Jagan Teki <jteki@...nedev.com>
Cc: Dan Williams <dan.j.williams@...el.com>
Cc: Vinod Koul <vinod.koul@...el.com>
---
 drivers/dma/omap-dma.c | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
index 167dbaf..3806524 100644
--- a/drivers/dma/omap-dma.c
+++ b/drivers/dma/omap-dma.c
@@ -168,7 +168,8 @@ static inline struct omap_chan *to_omap_dma_chan(struct dma_chan *c)
 	return container_of(c, struct omap_chan, vc.chan);
 }
 
-static inline struct omap_desc *to_omap_dma_desc(struct dma_async_tx_descriptor *t)
+static inline struct omap_desc *to_omap_dma_desc(
+				struct dma_async_tx_descriptor *t)
 {
 	return container_of(t, struct omap_desc, vd.tx);
 }
@@ -219,7 +220,8 @@ static unsigned omap_dma_read(unsigned type, void __iomem *addr)
 	return val;
 }
 
-static void omap_dma_glbl_write(struct omap_dmadev *od, unsigned reg, unsigned val)
+static void omap_dma_glbl_write(struct omap_dmadev *od,
+				unsigned reg, unsigned val)
 {
 	const struct omap_dma_reg *r = od->reg_map + reg;
 
@@ -334,7 +336,7 @@ static void omap_dma_stop(struct omap_chan *c)
 		if (val & (CCR_RD_ACTIVE | CCR_WR_ACTIVE))
 			dev_err(c->vc.chan.device->dev,
 				"DMA drain did not complete on lch %d\n",
-			        c->dma_ch);
+				c->dma_ch);
 
 		omap_dma_glbl_write(od, OCP_SYSCONFIG, sysconfig);
 	} else {
@@ -544,7 +546,8 @@ static int omap_dma_alloc_chan_resources(struct dma_chan *chan)
 			val = BIT(c->dma_ch);
 			omap_dma_glbl_write(od, IRQSTATUS_L1, val);
 			od->irq_enable_mask |= val;
-			omap_dma_glbl_write(od, IRQENABLE_L1, od->irq_enable_mask);
+			omap_dma_glbl_write(od, IRQENABLE_L1,
+						od->irq_enable_mask);
 
 			val = omap_dma_glbl_read(od, IRQENABLE_L0);
 			val &= ~BIT(c->dma_ch);
@@ -707,7 +710,8 @@ static enum dma_status omap_dma_tx_status(struct dma_chan *chan,
 	spin_lock_irqsave(&c->vc.lock, flags);
 	vd = vchan_find_desc(&c->vc, cookie);
 	if (vd) {
-		txstate->residue = omap_dma_desc_size(to_omap_dma_desc(&vd->tx));
+		txstate->residue = omap_dma_desc_size(
+						to_omap_dma_desc(&vd->tx));
 	} else if (c->desc && c->desc->vd.tx.cookie == cookie) {
 		struct omap_desc *d = c->desc;
 		dma_addr_t pos;
@@ -741,6 +745,7 @@ static void omap_dma_issue_pending(struct dma_chan *chan)
 		 */
 		if (!c->cyclic) {
 			struct omap_dmadev *d = to_omap_dma_dev(chan->device);
+
 			spin_lock(&d->lock);
 			if (list_empty(&c->node))
 				list_add_tail(&c->node, &d->pending);
@@ -948,7 +953,8 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_cyclic(
 	return vchan_tx_prep(&c->vc, &d->vd, flags);
 }
 
-static int omap_dma_slave_config(struct dma_chan *chan, struct dma_slave_config *cfg)
+static int omap_dma_slave_config(struct dma_chan *chan,
+				struct dma_slave_config *cfg)
 {
 	struct omap_chan *c = to_omap_dma_chan(chan);
 
-- 
1.9.1

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