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Message-ID: <alpine.DEB.2.10.1505201218520.6658@vshiva-Udesk>
Date:	Wed, 20 May 2015 13:43:58 -0700 (PDT)
From:	Vikas Shivappa <vikas.shivappa@...el.com>
To:	Thomas Gleixner <tglx@...utronix.de>
cc:	Vikas Shivappa <vikas.shivappa@...el.com>,
	Vikas Shivappa <vikas.shivappa@...ux.intel.com>,
	x86@...nel.org, linux-kernel@...r.kernel.org, hpa@...or.com,
	mingo@...nel.org, tj@...nel.org, peterz@...radead.org,
	Matt Fleming <matt.fleming@...el.com>,
	"Auld, Will" <will.auld@...el.com>, peter.zijlstra@...el.com,
	h.peter.anvin@...el.com,
	"Juvva, Kanaka D" <kanaka.d.juvva@...el.com>, mtosatti@...hat.com
Subject: Re: [PATCH 5/7] x86/intel_rdt: Software Cache for IA32_PQR_MSR



On Wed, 20 May 2015, Thomas Gleixner wrote:

> On Wed, 20 May 2015, Vikas Shivappa wrote:
>> On Fri, 15 May 2015, Thomas Gleixner wrote:
>>>> -static DEFINE_PER_CPU(struct intel_cqm_state, cqm_state);
>>>> +DEFINE_PER_CPU(struct intel_pqr_state, pqr_state);
>>>
>>> With CONFIG_PERF=n and CONFIG_CGROUP_RDT=y the linker will fail.
>>
>> copy from Makefile below -
>> obj-$(CONFIG_CPU_SUP_INTEL)             += perf_event_intel_rapl.o
>> perf_event_intel_cqm.o
>>
>> should work with CONFIG_PERF_EVENTS=n and CGROUP_RDT=y ?
>
> Groan. Did you try to compile it? Certainly not.

of course I did compile successfully after I changed PERF_EVENTS=n and RDT=y in 
the .config.
sorry, my reason was wrong though.

What I had not noticed was the .config is simply added to 
enabling CONFIG_PERF_EVENTS=y even though i disable it by editing 
.config.
Thats because x86 is selecting it.
So PERF_EVENTS cant be disabled on x86 and RDT is only in x86 && SUP_INTEL.

How did you configure CONFIG_PERF_EVENTS=n and CGROUP_RDT=y and see the error ?

Thanks,
Vikas

>
> Simply because the whole section which contains perf_event* object
> files is conditional on
>
> ifdef CONFIG_PERF_EVENTS
>
> I'm starting to get really grumpy and tired of your attitude.
>
> Thanks,
>
> 	tglx
>
>
>
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