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Message-ID: <CALCETrXTu=Bap0URw6VkxG=L7a7+fNq4qZG2Fa6xbtps_JhqxQ@mail.gmail.com>
Date: Wed, 20 May 2015 22:48:09 -0700
From: Andy Lutomirski <luto@...capital.net>
To: Huang Rui <ray.huang@....com>,
Thomas Gleixner <tglx@...utronix.de>,
"Rafael J. Wysocki" <rjw@...ysocki.net>,
Len Brown <lenb@...nel.org>, Borislav Petkov <bp@...e.de>
Cc: John Stultz <john.stultz@...aro.org>, Tony Li <tony.li@....com>,
X86 ML <x86@...nel.org>, Peter Zijlstra <peterz@...radead.org>,
Aaron Lu <aaron.lu@...el.com>,
Fengguang Wu <fengguang.wu@...el.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [RFC PATCH 2/4] x86, mwaitt: introduce mwaitx idle with a
configurable timer
On May 20, 2015 6:34 PM, "Andy Lutomirski" <luto@...nel.org> wrote:
> If we did that *and* we had a non-crappy mwaitx, then we could apply an optimization: when going idle, we could turn off the TSC deadline timer and use mwaitx instead. This would about an interrupt if the event that wakes us is our timer.
>
Hey, Intel, want to document your secret "Timed MWAIT" feature? It
causes a transition to C0 when the deadline expires (see 4.2.4 of the
Desktop 4th Generation Intel Core Processor Family Datasheet Volume 1,
order number 328897-001) and it even has an erratum (HSD63 / BDM32),
but the instruction itself doesn't appear to be documented.
--Andy
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