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Message-ID: <20150521102802.GS21577@sirena.org.uk>
Date:	Thu, 21 May 2015 11:28:02 +0100
From:	Mark Brown <broonie@...nel.org>
To:	Michal Suchanek <hramrach@...il.com>
Cc:	Brian Norris <computersforpeace@...il.com>,
	linux-sunxi <linux-sunxi@...glegroups.com>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	David Woodhouse <dwmw2@...radead.org>,
	Marek Vasut <marex@...x.de>,
	Huang Shijie <b32955@...escale.com>,
	Rafał Miłecki <zajec5@...il.com>,
	Ben Hutchings <ben@...adent.org.uk>,
	Alison Chaiken <alison_chaiken@...tor.com>,
	Mika Westerberg <mika.westerberg@...ux.intel.com>,
	Bean Huo 霍斌斌 (beanhuo) 
	<beanhuo@...ron.com>, "grmoore@...era.com" <grmoore@...era.com>,
	devicetree <devicetree@...r.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	linux-mtd@...ts.infradead.org,
	linux-spi <linux-spi@...r.kernel.org>
Subject: Re: [PATCH 2/3] MTD: spi-nor: check for short writes in
 spi_nor_write.

On Thu, May 21, 2015 at 10:39:13AM +0200, Michal Suchanek wrote:
> On 21 May 2015 at 01:38, Brian Norris <computersforpeace@...il.com> wrote:

Why is this thread about SPI error handling CCed to quite so many
people?

> >> Check the amount of data actually written by the driver.

> > I'm not sure if we should just reactively use the retlen, or if we
> > should be communicating such a limitation via the SPI API. Thoughts?

> Is there any driver that would break if the SPI master truncated
> writes when the message is too long rather than returning an error an
> refusing the transfer?

Any such driver is buggy, the actual length transferred has always been
a part of the SPI API.  We should probably expose limitations so clients
can query in advance (we don't at the minute) but it'd be a while before
clients could rely on that information being useful and it's still
possible things can be truncated by error.

With modern drivers using transfer_one() where we have control of the
chip select we do also have the ability to add support to the core for
chopping large transfers up into smaller ones that the hardware can
handle transparently.  That won't for everything though since it depends
on us being able to manually control the chip select which not all
hardware can do.

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