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Message-ID: <CABPqkBS1TOcD_WffCfGYuK8u_18Pju_B5pB_TRrOeSQ8aVjb0g@mail.gmail.com>
Date:	Thu, 21 May 2015 08:42:02 -0700
From:	Stephane Eranian <eranian@...gle.com>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	Ingo Molnar <mingo@...nel.org>,
	Vince Weaver <vincent.weaver@...ne.edu>,
	Jiri Olsa <jolsa@...hat.com>,
	"Liang, Kan" <kan.liang@...el.com>,
	LKML <linux-kernel@...r.kernel.org>,
	Andrew Hunter <ahh@...gle.com>,
	Maria Dimakopoulou <maria.n.dimakopoulou@...il.com>
Subject: Re: [PATCH 01/10] perf,x86: Fix event/group validation

On Thu, May 21, 2015 at 7:53 AM, Peter Zijlstra <peterz@...radead.org> wrote:
> On Thu, May 21, 2015 at 01:17:11PM +0200, Peter Zijlstra wrote:
>> --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
>> +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
>> @@ -706,9 +706,9 @@ void intel_pmu_pebs_disable(struct perf_
>>
>>       cpuc->pebs_enabled &= ~(1ULL << hwc->idx);
>>
>> -     if (event->hw.constraint->flags & PERF_X86_EVENT_PEBS_LDLAT)
>> +     if (event->hw.flags & PERF_X86_EVENT_PEBS_LDLAT)
>>               cpuc->pebs_enabled &= ~(1ULL << (hwc->idx + 32));
>> -     else if (event->hw.constraint->flags & PERF_X86_EVENT_PEBS_ST)
>> +     else if (event->hw.flags & PERF_X86_EVENT_PEBS_ST)
>>               cpuc->pebs_enabled &= ~(1ULL << 63);
>>
>>       if (cpuc->enabled)
>
> This btw look like an independent bug.

You mean, referring to event->hw.constraint?
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