linux-kernel - Re: [PATCH 05/15] irqchip: mips-gic: register IRQ domain with MIPS_GIC_IRQ

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Date:	Fri, 22 May 2015 17:27:02 +0000
From:	Jason Cooper <jason@...edaemon.net>
To:	Paul Burton <paul.burton@...tec.com>
Cc:	linux-mips@...ux-mips.org, devicetree@...r.kernel.org,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 05/15] irqchip: mips-gic: register IRQ domain with
 MIPS_GIC_IRQ_BASE

On Fri, May 22, 2015 at 04:51:04PM +0100, Paul Burton wrote:
> On Malta, some IRQs are still referenced by hardcoded numbers relative
> to MIPS_GIC_IRQ_BASE. When gic_init is called to register the GIC
> without using device tree the irqbase argument allows this base to be
> used. When the GIC is probed using device tree however the base is not
> specified. This leads to conflicts between the GIC interrupts and other
> interrupt controllers.
> 
> TODO: convert Malta (& SEAD3) to drop the hardcoded numbers instead

This will never be seen again. :-P  Why not just go ahead and do it as separate
patch(es) in this series?

thx,

Jason.

> Signed-off-by: Paul Burton <paul.burton@...tec.com>
> ---
> 
>  drivers/irqchip/irq-mips-gic.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
> index 57f09cb..697f340 100644
> --- a/drivers/irqchip/irq-mips-gic.c
> +++ b/drivers/irqchip/irq-mips-gic.c
> @@ -858,7 +858,7 @@ static int __init gic_of_init(struct device_node *node,
>  		write_gcr_gic_base(gic_base | CM_GCR_GIC_BASE_GICEN_MSK);
>  	gic_present = true;
>  
> -	__gic_init(gic_base, gic_len, cpu_vec, 0, node);
> +	__gic_init(gic_base, gic_len, cpu_vec, MIPS_GIC_IRQ_BASE, node);
>  
>  	return 0;
>  }
> -- 
> 2.4.1
> 
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