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Message-ID: <CAL1qeaE=JeErsEn8peh2Ys1pJWgDWRFV3d2_KFGF2VoiJjnxVg@mail.gmail.com>
Date:	Fri, 22 May 2015 10:48:47 -0700
From:	Andrew Bresticker <abrestic@...omium.org>
To:	Ezequiel Garcia <ezequiel.garcia@...tec.com>
Cc:	Linux-MIPS <linux-mips@...ux-mips.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Mike Turquette <mturquette@...aro.org>,
	Stephen Boyd <sboyd@...eaurora.org>,
	James Hartley <james.hartley@...tec.com>,
	Govindraj Raja <Govindraj.Raja@...tec.com>,
	Damien Horsley <Damien.Horsley@...tec.com>,
	Kevin Cernekee <cernekee@...omium.org>,
	James Hogan <james.hogan@...tec.com>
Subject: Re: [PATCH 8/9] clk: pistachio: Add sanity checks on PLL configuration

On Thu, May 21, 2015 at 4:57 PM, Ezequiel Garcia
<ezequiel.garcia@...tec.com> wrote:
> From: Kevin Cernekee <cernekee@...omium.org>
>
> When setting the PLL rates, check that:
>
>  - VCO is within range
>  - PFD is within range
>  - PLL is disabled when postdiv is changed
>  - postdiv2 <= postdiv1
>
> Signed-off-by: Kevin Cernekee <cernekee@...omium.org>
> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@...tec.com>

Reviewed-by: Andrew Bresticker <abrestic@...omium.org>
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