linux-kernel - Re: [PATCH v2 6/7] Watchdog: introduce ARM SBSA watchdog driver

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Message-ID: <5561FAFF.1050602@roeck-us.net>
Date:	Sun, 24 May 2015 09:23:27 -0700
From:	Guenter Roeck <linux@...ck-us.net>
To:	Fu Wei <fu.wei@...aro.org>
CC:	Timur Tabi <timur@...eaurora.org>,
	Suravee Suthikulpanit <Suravee.Suthikulpanit@....com>,
	Linaro ACPI Mailman List <linaro-acpi@...ts.linaro.org>,
	linux-watchdog@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org,
	Wei Fu <tekkamanninja@...il.com>,
	G Gregory <graeme.gregory@...aro.org>,
	Al Stone <al.stone@...aro.org>,
	Hanjun Guo <hanjun.guo@...aro.org>,
	Ashwin Chaugule <ashwin.chaugule@...aro.org>,
	Arnd Bergmann <arnd@...db.de>, vgandhi@...eaurora.org,
	wim@...ana.be, Jon Masters <jcm@...hat.com>,
	Leo Duran <leo.duran@....com>, Jon Corbet <corbet@....net>,
	Mark Rutland <mark.rutland@....com>
Subject: Re: [PATCH v2 6/7] Watchdog: introduce ARM SBSA watchdog driver

On 05/24/2015 08:50 AM, Fu Wei wrote:
[ ...]

> Actually, I have added my thought at the head of sbsa_gwdt.c as a comment :
>
>    *
>   * Note: This SBSA Generic watchdog driver is compatible with
>   *       the pretimeout concept of Linux kernel.
>   *       The timeout and pretimeout are set by the different REGs.
>   *       The first watch period is set by writing WCV directly,
>   *       that can support more than 10s timeout at the maximum
>   *       system counter frequency.
>   *       The second watch period is set by WOR(32bit) which will be loaded
>   *       automatically by hardware, when WS0 is triggered.
>   *       This gives a maximum watch period of around 10s at the maximum
>   *       system counter frequency.
>   *       The System Counter shall run at maximum of 400MHz.
>   *       More details: DEN0029B - Server Base System Architecture (SBSA)
>   *
>   * Kernel/API:                         P---------| pretimeout
>   *               |-------------------------------T timeout
>   * SBSA GWDT:                          P--WOR---WS1 pretimeout
>   *               |-------WCV----------WS0~~~~~~~~T timeout
>   */
>

Yes, but do we actually _know_ that it works that way, ie that WCV
drives WS0 and that WOR drives WS1 ? Unless I am missing something,
the specification doesn't say that, and it would have been a really
easy statement to make if that was the intent.

My concern here is that the above behavior is not spelled out in
the document, meaning it is up to interpretation by the hardware
engineer implementing it, to the point where it appears that not
even two software engineers can agree how it is supposed to work.
Which is a really bad starting point :-(.

Thanks,
Guenter

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