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Message-ID: <CAJ5Y-eZfzrDtEL5gpZ1rRNUhr2dCZKuA-MMNcwV=TgFW_9rq=g@mail.gmail.com>
Date: Tue, 26 May 2015 11:02:56 -0400
From: Ashwin Chaugule <ashwin.chaugule@...aro.org>
To: Will Deacon <will.deacon@....com>
Cc: "fu.wei@...aro.org" <fu.wei@...aro.org>,
"suravee.suthikulpanit@....com" <suravee.suthikulpanit@....com>,
"linaro-acpi@...ts.linaro.org" <linaro-acpi@...ts.linaro.org>,
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Mark Rutland <Mark.Rutland@....com>,
Catalin Marinas <Catalin.Marinas@....com>
Subject: Re: [PATCH v3 6/6] ACPI: import watchdog info of GTDT into platform device
Hi Will,
On 26 May 2015 at 08:28, Will Deacon <will.deacon@....com> wrote:
> On Mon, May 25, 2015 at 11:03:13AM +0100, fu.wei@...aro.org wrote:
>> From: Fu Wei <fu.wei@...aro.org>
>>
>> Parse SBSA Generic Watchdog Structure in GTDT table of ACPI,
>> and create a platform device with that information.
>> This platform device can be used by the ARM SBSA Generic
>> Watchdog driver.
>>
>> Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@....com>
>> Tested-by: Timur Tabi <timur@...eaurora.org>
>> Signed-off-by: Fu Wei <fu.wei@...aro.org>
>> ---
>> arch/arm64/kernel/acpi.c | 145 +++++++++++++++++++++++++++++++++++++++++++++++
>> 1 file changed, 145 insertions(+)
>
> Why does this all need to be under arch/arm64? The GTDT really isn't
> architecture-specific, so I'd *much* rather it was parsed in the driver code
> itself, like we already do for the architected timer. The GIC is an
> exception because it's in the MADT, which we need to parse in the arch code
> to configure SMP properly.
I'm not really against refactoring the code. But the GTDT looks quite
specific to ARM..
---8<----
5.2.24 Generic Timer Description Table (GTDT)
This section describes the format of the Generic Timer Description
Table (GTDT), which provides
OSPM with information about a system’s Generic Timers configuration.
The Generic Timer (GT) is
a standard timer interface implemented on ARM processor-based systems.
The GT hardware
specification can be found at Links to ACPI-Related Documents
(http://uefi.org/acpi) under the
heading ARM Architecture. The GTDT provides OSPM with information
about a system's GT
interrupt configurations, for both per-processor timers, and platform
(memory-mapped) timers.
The GT specification defines the following per-processor timers:
• Secure privilege level 1 (EL1) timer,
• Non-Secure EL1 timer,
• Non-Secure privilege level 2 (EL2) timer,
• Virtual timer,
and the following Platform (memory-mapped) timers.
• GT Block
• Server Base System Architecture (SBSA) Generic Watchdog
---8<----
Thanks,
Ashwin.
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