linux-kernel - Re: [RFC/RFT PATCH] PCI: move pci_read_bridge

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Message-ID: <55661F71.3090100@amd.com>
Date:	Wed, 27 May 2015 14:48:01 -0500
From:	Suravee Suthikulanit <suravee.suthikulpanit@....com>
To:	Lorenzo Pieralisi <lorenzo.pieralisi@....com>
CC:	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	Ralf Baechle <ralf@...ux-mips.org>,
	"James E.J. Bottomley" <jejb@...isc-linux.org>,
	Michael Ellerman <mpe@...erman.id.au>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Richard Henderson <rth@...ddle.net>,
	Benjamin Herrenschmidt <benh@...nel.crashing.org>,
	David Howells <dhowells@...hat.com>,
	Russell King <linux@....linux.org.uk>,
	Tony Luck <tony.luck@...el.com>,
	"David S. Miller" <davem@...emloft.net>,
	Ingo Molnar <mingo@...hat.com>,
	Michal Simek <monstr@...str.eu>,
	"yasutake.koichi@...panasonic.com" <yasutake.koichi@...panasonic.com>,
	Chris Zankel <chris@...kel.net>,
	"Arnd Bergmann" <arnd@...db.de>,
	Krzysztof Halasa <khalasa@...p.pl>,
	Phil Edworthy <phil.edworthy@...esas.com>,
	Jason Gunthorpe <jgunthorpe@...idianresearch.com>,
	Jingoo Han <jg1.han@...sung.com>,
	"Lucas Stach" <l.stach@...gutronix.de>,
	Simon Horman <horms@...ge.net.au>,
	"Minghuan Lian" <minghuan.Lian@...escale.com>,
	Murali Karicheri <m-karicheri2@...com>,
	Tanmay Inamdar <tinamdar@....com>,
	Kishon Vijay Abraham I <kishon@...com>,
	Thierry Reding <thierry.reding@...il.com>,
	Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
	Will Deacon <Will.Deacon@....com>,
	Jayachandran C <jchandra@...adcom.com>
Subject: Re: [RFC/RFT PATCH] PCI: move pci_read_bridge_bases to the generic
 PCI layer

On 5/27/2015 12:54 PM, Lorenzo Pieralisi wrote:
>>> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
>>> > >index 062fee6..335d9f2 100644
>>> > >--- a/drivers/pci/probe.c
>>> > >+++ b/drivers/pci/probe.c
>>> > >@@ -453,7 +453,11 @@ void pci_read_bridge_bases(struct pci_bus *child)
>>> > >   	struct resource *res;
>>> > >   	int i;
>>> > >
>>> > >-	if (pci_is_root_bus(child))	/* It's a host bus, nothing to read */
>>> > >+	/*
>>> > >+	 * If it is not a PCI bridge there is nothing to read
>>> > >+	 */
>>> > >+	if (pci_is_root_bus(child) || !dev ||
>>> > >+		!((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI))
>>> > >   		return;
>>> > >
>>> > >   	dev_info(&dev->dev, "PCI bridge to %pR%s\n",
>>> > >@@ -1878,6 +1882,11 @@ unsigned int pci_scan_child_bus(struct pci_bus *bus)
>>> > >   	 * all PCI-to-PCI bridges on this bus.
>>> > >   	 */
>>> > >   	if (!bus->is_added) {
>>> > >+		/*
>>> > >+		 * Read and initialize bridge resources.
>>> > >+		 */
>>> > >+		pci_read_bridge_bases(bus);
>>> > >+
>>> > >   		dev_dbg(&bus->dev, "fixups for bus\n");
>>> > >   		pcibios_fixup_bus(bus);
>>> > >   		bus->is_added = 1;
>>> > >
>> >
>> >So, I have tested the patch on ARM64 system w/ PROBE_ONLY mode, and
>> >noticed that we are calling pci_read_bridge_bases() after adding the
>> >devices on the slots. This is not soon enough since the downstream
>> >devices still failing to claim resources.
>> >
>> >However, do you think we can move pci_read_bridge_bases() before the
>> >pci_scan_slot() loop?
> Right, how about moving it to pci_scan_bridge() before calling the
> respective pci_scan_child_bus() ? I think it belongs there anyway.
>
> Thanks,

That seems reasonable. I test putting it here in pci_scan_bridge(),
and it works.

....
	child = pci_find_bus(pci_domain_nr(bus), secondary);
	if (!child) {
		child = pci_add_new_bus(bus, dev, secondary);
		if (!child)
			goto out;
		child->primary = primary;
		pci_bus_insert_busn_res(child, secondary, subordinate);
		child->bridge_ctl = bctl;
		pci_read_bridge_bases(child);
	}

	cmax = pci_scan_child_bus(child);
.....

Thanks,
Suravee
	


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