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Message-ID: <CALCETrV0h+i+PiBTW7ssQ7Hmn9+r97AK4TyauXd5qApHBcfgpA@mail.gmail.com>
Date: Thu, 28 May 2015 18:05:33 -0700
From: Andy Lutomirski <luto@...capital.net>
To: Dave Hansen <dave@...1.net>
Cc: Ingo Molnar <mingo@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
X86 ML <x86@...nel.org>, Thomas Gleixner <tglx@...utronix.de>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Oleg Nesterov <oleg@...hat.com>,
Borislav Petkov <bp@...en8.de>, Rik van Riel <riel@...hat.com>,
Suresh Siddha <sbsiddha@...il.com>,
Ingo Molnar <mingo@...hat.com>,
"H. Peter Anvin" <hpa@...or.com>,
Fenghua Yu <fenghua.yu@...el.com>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Peter Zijlstra <a.p.zijlstra@...llo.nl>
Subject: Re: [PATCH 02/19] x86, fpu: Wrap get_xsave_addr() to make it safer
On Thu, May 28, 2015 at 9:24 AM, Dave Hansen <dave@...1.net> wrote:
> On 05/28/2015 08:01 AM, Ingo Molnar wrote:
>> But the real question is: can we support in-use MPX with asynchronous lazy
>> restore, while it's still semantically correct? I don't think so, unless you add
>> MPX specific synchronous restore to the context switch path, which isn't such a
>> good idea IMHO.
>
> Right now, we assume that the first use of the FPU gets an #ND exception
> to tell us that someone is using the FPU. MPX doesn't generate #ND,
> thus the need to do it eagerly.
>
> On CPUs that support it we could, instead, do an xgetbv during the
> context switch to ensure that all things having an xstate/xfeature but
> that do not generate #ND exceptions are in their init state. If they
> are not in their init state, we exit lazy mode.
>
> We could theoretically use the same kind of thing with the compacted
> xsave format to ensure that we only allocate enough space for what we
> *need* in the xsave buffer and not allocate for the worst-case. AVX512
> has 32x512-bit registers (2kbytes) and it would be a bit of a shame to
> need to allocate ~3k of space.
I understand the point of this type of optimization (except that I
really don't like the idea of sending SIGBUS or whatever if we fail an
allocation at context switch time), but why are we even considering
trying to support MPX and lazy fpu at the same time? Judging from all
the bug reports, it seems like it's a giant mess, and the code to
support lazy restore is not exactly pretty.
I would propose that we take the opposite approach and just ban
eagerfpu=off when MPX is enabled. We could then take the next step
and default eagerfpu=on for everyone and, if nothing breaks, then just
delete lazy mode entirely.
I suspect we'd have to go back to Pentium 3 or earlier to find a CPU
on which lazy mode is actually a good idea. Fiddling with CR0 and
handling exceptions is really slow, and I think we should trust CPUs
with XSAVEOPT support to do their job and let the older CPUs take the
small performance hit, if it even is a performance hit.
--Andy
--
Andy Lutomirski
AMA Capital Management, LLC
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