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Date:	Fri, 29 May 2015 17:38:36 +0200
From:	Borislav Petkov <bp@...en8.de>
To:	Aravind Gopalakrishnan <Aravind.Gopalakrishnan@....com>
Cc:	dougthompson@...ssion.com, mchehab@....samsung.com,
	linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 5/6] edac, mce_amd_inj: Add README file

On Wed, May 27, 2015 at 02:03:37PM -0500, Aravind Gopalakrishnan wrote:
> Provides information about each file and the usages.
> 
> Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@....com>
> ---
>  drivers/edac/mce_amd_inj.c | 68 +++++++++++++++++++++++++++++++++++++++++-----
>  1 file changed, 61 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/edac/mce_amd_inj.c b/drivers/edac/mce_amd_inj.c
> index f1c1433..ca5b29f 100644
> --- a/drivers/edac/mce_amd_inj.c
> +++ b/drivers/edac/mce_amd_inj.c
> @@ -291,17 +291,71 @@ MCE_INJECT_GET(bank);
>  
>  DEFINE_SIMPLE_ATTRIBUTE(bank_fops, inj_bank_get, inj_bank_set, "%llu\n");
>  
> +static const char readme_msg[] =
> +	"\nDescription of the files and their usages:\n\n"
> +	"status:  Set a value to be programmed into MCx_STATUS(bank)\n"
> +	"\t The status bits provide insight into the type of\n"
> +	"\t error that caused the MCE.\n\n"
> +	"misc:	 Set value of MCx_MISC(bank)\n"
> +	"\t misc register provides auxiliary info about the error. This\n"
> +	"\t register is typically used for error thresholding purpose and\n"
> +	"\t validity of the register is indicated by MCx_STATUS[MiscV]\n\n"
> +	"addr:	 Error address value to be written to MCx_ADDR(bank)\n"
> +	"\t This register is used to log address information associated\n"
> +	"\t with the error.\n\n"
> +	"Note:	 See respective BKDGs for the exact bit definitions of the\n"
> +	"\t above registers as they mirror the MCi_[STATUS | MISC | ADDR]\n"
> +	"\t hardware registers.\n\n"
> +	"bank:	 Specify the bank you want to inject the error into.\n"
> +	"\t The number of banks in a processor varies and is family/model\n"
> +	"\t dependent. So, a sanity check performed while writing.\n"
> +	"\t Writing to this file will trigger a #MC or APIC interrupts or\n"
> +	"\t invoke the error decoder routines for AMD processors. The value\n"
> +	"\t in 'flags' file decides which of above actions is triggered.\n\n"
> +	"flags:	 Write to this file to speficy the error injection policy.\n"
> +	"\t Allowed values:\n"
> +	"\t\t\"sw\"  -	SW error injection, Only calls error decoder\n"
> +	"\t\t\troutines to print error info in human readable format\n"
> +	"\t\t\"hw\"  -	HW error injection, Forces a #MC,\n"
> +	"\t\t\tcauses exception handler to handle the error\n"
> +	"\t\t\tif UC or poll handler catches it if CE\n"
> +	"\t\t\tWarning: Might cause system panic if MCx_STATUS[PCC]\n"
> +	"\t\t\tis set. For debug purposes, consider setting\n"
> +	"\t\t\t/<debugfs_mountpoint>/mce/fake_panic\n"
> +	"\t\t\"dfr\" -	Trigger APIC interrupt for Deferred error\n"
> +	"\t\t\tError is handled by deferred error apic handler if\n"
> +	"\t\t\tfeature is present in HW.\n"
> +	"\t\t\"thr\" -	Trigger APIC interrupt for threshold error\n"
> +	"\t\t\tError is handled by threshold apic handler\n\n"
> +	"cpu:	 The cpu to inject the error on.\n\n"
> +;

This one needs to be split in two - the second one adding the readme file...

> +static ssize_t
> +inj_readme_read(struct file *filp, char __user *ubuf,
> +		       size_t cnt, loff_t *ppos)
> +{
> +	return simple_read_from_buffer(ubuf, cnt, ppos,
> +					readme_msg, strlen(readme_msg));
> +}
> +
> +static const struct file_operations readme_fops = {
> +	.read		= inj_readme_read,
> +};
> +
>  static struct dfs_node {
>  	char *name;
>  	struct dentry *d;
>  	const struct file_operations *fops;
> +	umode_t perm;
>  } dfs_fls[] = {
> -	{ .name = "status",	.fops = &status_fops },
> -	{ .name = "misc",	.fops = &misc_fops },
> -	{ .name = "addr",	.fops = &addr_fops },
> -	{ .name = "bank",	.fops = &bank_fops },
> -	{ .name = "flags",	.fops = &flags_fops },
> -	{ .name = "cpu",	.fops = &extcpu_fops },
> +	{ .name = "status",	.fops = &status_fops,	S_IRUSR | S_IWUSR },
> +	{ .name = "misc",	.fops = &misc_fops,	S_IRUSR | S_IWUSR },
> +	{ .name = "addr",	.fops = &addr_fops,	S_IRUSR | S_IWUSR },
> +	{ .name = "bank",	.fops = &bank_fops,	S_IRUSR | S_IWUSR },
> +	{ .name = "flags",	.fops = &flags_fops,	S_IRUSR | S_IWUSR },
> +	{ .name = "cpu",	.fops = &extcpu_fops,	S_IRUSR | S_IWUSR },
> +	{ .name = "README",	.fops = &readme_fops,	S_IRUSR | S_IRGRP |
> +							S_IROTH },

... and the first one adding perm to struct dfs_node.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.
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