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Message-Id: <1433029955-7346-1-git-send-email-albeu@free.fr>
Date:	Sun, 31 May 2015 01:52:23 +0200
From:	Alban Bedel <albeu@...e.fr>
To:	linux-mips@...ux-mips.org
Cc:	Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Jason Cooper <jason@...edaemon.net>,
	Ralf Baechle <ralf@...ux-mips.org>,
	Alban Bedel <albeu@...e.fr>,
	Andrew Bresticker <abrestic@...omium.org>,
	Qais Yousef <qais.yousef@...tec.com>,
	Gabor Juhos <juhosg@...nwrt.org>, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: [PATCH v4 00/12] MIPS: ath79: Add OF support and DTS for TL-WR1043ND

This series add OF bindings and code support for the interrupt
controllers, clocks and GPIOs. However it was only tested on a
TL-WR1043ND with an AR9132, others SoCs are untested, and a few are
not supported at all.

Most code changes base on the previous bug fix series:
[PATCH v2 0/5] MIPS: ath79: Various small fix to prepare OF support

The requested patch to move the GPIO driver to drivers/gpio is ready and
will follow once it is clearer if this serie get merged.

ChangeLog:
v2: * Fixed the OF bindings and DTS to use ePAPR standardized names
    * Fixed the typos in the OF bindings
    * Added an ngpios property to the GPIO binding and driver
    * Removed all the soc_is_xxx() calls out of the GPIO driver probe()
    * Updated the DTS patches to the new directory structure and merged both
      in one. Having 3 patches to add Makefile, SoC dtsi and board DTS seemed
      a bit overkill.
    * Moved the patch to use the common clk API to the bug fix serie to keep
      this one cleaner.

v3: * Moved the builtin DTB menu to the patch adding the TL-WR1043ND DTS
    * Made the builtin DTB menu optional
    * Fixed more typos
    * Really fixed the DDR controller binding example to use ePAPR names
    * Fixed the qca9550 compatible string in the PLL bindings and driver
    * Fixed the example in the GPIO controller binding
    * Moved the new vendor entry to the correct place

v4: * Added the missing Signed-off-by on patch 08
    * Whitspace fix in the GPIO controller binding
    * Always build the DTB to improve testing coverage
    * Added the SPI controller and flash to the DTS as the binding for
      the SPI controller has been accepted in the SPI tree

Alban Bedel (12):
  devicetree: Add bindings for the SoC of the ATH79 family
  MIPS: ath79: Add basic device tree support
  devicetree: Add bindings for the ATH79 DDR controllers
  devicetree: Add bindings for the ATH79 interrupt controllers
  devicetree: Add bindings for the ATH79 MISC interrupt controllers
  MIPS: ath79: Add OF support to the IRQ controllers
  devicetree: Add bindings for the ATH79 PLL controllers
  MIPS: ath79: Add OF support to the clocks
  devicetree: Add bindings for the ATH79 GPIO controllers
  MIPS: ath79: Add OF support to the GPIO driver
  of: Add vendor prefix for TP-Link Technologies Co. Ltd
  MIPS: Add basic support for the TL-WR1043ND version 1

 .../devicetree/bindings/clock/qca,ath79-pll.txt    |  33 +++++
 .../devicetree/bindings/gpio/gpio-ath79.txt        |  38 ++++++
 .../interrupt-controller/qca,ath79-cpu-intc.txt    |  44 +++++++
 .../interrupt-controller/qca,ath79-misc-intc.txt   |  30 +++++
 .../memory-controllers/ath79-ddr-controller.txt    |  35 ++++++
 .../devicetree/bindings/mips/ath79-soc.txt         |  21 ++++
 .../devicetree/bindings/vendor-prefixes.txt        |   1 +
 arch/mips/Kconfig                                  |   1 +
 arch/mips/ath79/Kconfig                            |  12 ++
 arch/mips/ath79/clock.c                            |  63 +++++++---
 arch/mips/ath79/dev-common.c                       |  51 ++++++++
 arch/mips/ath79/gpio.c                             |  79 ++++++++----
 arch/mips/ath79/irq.c                              |  87 +++++++++++++-
 arch/mips/ath79/machtypes.h                        |   1 +
 arch/mips/ath79/setup.c                            |  27 ++++-
 arch/mips/boot/dts/Makefile                        |   1 +
 arch/mips/boot/dts/qca/Makefile                    |  11 ++
 arch/mips/boot/dts/qca/ar9132.dtsi                 | 133 +++++++++++++++++++++
 arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts   | 112 +++++++++++++++++
 include/linux/platform_data/gpio-ath79.h           |  19 +++
 20 files changed, 756 insertions(+), 43 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/qca,ath79-pll.txt
 create mode 100644 Documentation/devicetree/bindings/gpio/gpio-ath79.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/qca,ath79-cpu-intc.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt
 create mode 100644 Documentation/devicetree/bindings/memory-controllers/ath79-ddr-controller.txt
 create mode 100644 Documentation/devicetree/bindings/mips/ath79-soc.txt
 create mode 100644 arch/mips/boot/dts/qca/Makefile
 create mode 100644 arch/mips/boot/dts/qca/ar9132.dtsi
 create mode 100644 arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts
 create mode 100644 include/linux/platform_data/gpio-ath79.h

-- 
2.0.0

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