linux-kernel - Re: [PATCH 2/4] x86/pat: Merge pat_init_cache

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Date:	Sun, 31 May 2015 12:15:21 +0200
From:	Juergen Gross <jgross@...e.com>
To:	Borislav Petkov <bp@...en8.de>, LKML <linux-kernel@...r.kernel.org>
CC:	Andrew Morton <akpm@...ux-foundation.org>,
	Andy Lutomirski <luto@...capital.net>, arnd@...db.de,
	Elliott@...com, hch@....de, hmh@....eng.br,
	"H. Peter Anvin" <hpa@...or.com>, Ingo Molnar <mingo@...hat.com>,
	konrad.wilk@...cle.com, linux-mm <linux-mm@...ck.org>,
	linux-nvdimm@...ts.01.org, "Luis R. Rodriguez" <mcgrof@...e.com>,
	stefan.bader@...onical.com, Thomas Gleixner <tglx@...utronix.de>,
	Toshi Kani <toshi.kani@...com>, x86-ml <x86@...nel.org>,
	yigal@...xistor.com
Subject: Re: [PATCH 2/4] x86/pat: Merge pat_init_cache_modes() into its caller

On 05/31/2015 11:48 AM, Borislav Petkov wrote:
> From: Borislav Petkov <bp@...e.de>
>
> This way we can pass pat MSR value directly.
>
> No functionality change.

You are breaking the Xen build with that change. pat_init_cache_modes()
is called from arch/x86/xen/enlighten.c as well.


Juergen

>
> Signed-off-by: Borislav Petkov <bp@...e.de>
> Cc: Andrew Morton <akpm@...ux-foundation.org>
> Cc: Andy Lutomirski <luto@...capital.net>
> Cc: arnd@...db.de
> Cc: Elliott@...com
> Cc: hch@....de
> Cc: hmh@....eng.br
> Cc: H. Peter Anvin <hpa@...or.com>
> Cc: Ingo Molnar <mingo@...hat.com>
> Cc: jgross@...e.com
> Cc: konrad.wilk@...cle.com
> Cc: linux-mm <linux-mm@...ck.org>
> Cc: linux-nvdimm@...ts.01.org
> Cc: Luis R. Rodriguez <mcgrof@...e.com>
> Cc: stefan.bader@...onical.com
> Cc: Thomas Gleixner <tglx@...utronix.de>
> Cc: Toshi Kani <toshi.kani@...com>
> Cc: x86-ml <x86@...nel.org>
> Cc: yigal@...xistor.com
> ---
>   arch/x86/mm/pat.c | 39 ++++++++++++++++-----------------------
>   1 file changed, 16 insertions(+), 23 deletions(-)
>
> diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
> index 476d0780560f..4d28759f5a1a 100644
> --- a/arch/x86/mm/pat.c
> +++ b/arch/x86/mm/pat.c
> @@ -172,32 +172,14 @@ static enum page_cache_mode pat_get_cache_mode(unsigned pat_val, char *msg)
>
>   #undef CM
>
> -/*
> - * Update the cache mode to pgprot translation tables according to PAT
> - * configuration.
> - * Using lower indices is preferred, so we start with highest index.
> - */
> -void pat_init_cache_modes(void)
> -{
> -	int i;
> -	enum page_cache_mode cache;
> -	char pat_msg[33];
> -	u64 pat;
> -
> -	rdmsrl(MSR_IA32_CR_PAT, pat);
> -	pat_msg[32] = 0;
> -	for (i = 7; i >= 0; i--) {
> -		cache = pat_get_cache_mode((pat >> (i * 8)) & 7,
> -					   pat_msg + 4 * i);
> -		update_cache_mode_entry(i, cache);
> -	}
> -	pr_info("x86/PAT: Configuration [0-7]: %s\n", pat_msg);
> -}
> -
>   #define PAT(x, y)	((u64)PAT_ ## y << ((x)*8))
>
>   static void pat_bsp_init(u64 pat)
>   {
> +	enum page_cache_mode cache;
> +	char pat_msg[33];
> +	int i;
> +
>   	if (!cpu_has_pat) {
>   		pat_disable("PAT not supported by CPU.");
>   		return;
> @@ -211,7 +193,18 @@ static void pat_bsp_init(u64 pat)
>
>   	wrmsrl(MSR_IA32_CR_PAT, pat);
>
> -	pat_init_cache_modes();
> +	pat_msg[32] = 0;
> +
> +	/*
> +	 * Update the cache mode to pgprot translation tables according to PAT
> +	 * configuration. Using lower indices is preferred, so we start with
> +	 * highest index.
> +	 */
> +	for (i = 7; i >= 0; i--) {
> +		cache = pat_get_cache_mode((pat >> (i * 8)) & 7, pat_msg + 4 * i);
> +		update_cache_mode_entry(i, cache);
> +	}
> +	pr_info("x86/PAT: Configuration [0-7]: %s\n", pat_msg);
>   }
>
>   static void pat_ap_init(u64 pat)
>

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