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Message-ID: <20150601090902.GA31271@dhcp-128-28.nay.redhat.com>
Date:	Mon, 1 Jun 2015 17:09:02 +0800
From:	Baoquan He <bhe@...hat.com>
To:	Joerg Roedel <joro@...tes.org>
Cc:	linux-kernel@...r.kernel.org
Subject: Re: A question about state machine function state_next()

On 06/01/15 at 08:42am, Joerg Roedel wrote:
> Hi Baoquan,
> 
> On Mon, Jun 01, 2015 at 11:09:40AM +0800, Baoquan He wrote:
> > I am reading amd iommu code because I have some knowledge about intel
> > iommu since review Zhenhua's fixing kdump error patches. Now there's
> > a question I didn't find answer.
> > 
> > In amd iommu state_next() is the state machine running function. However
> > I only found 4 function to call iommu_go_to_state() to change the state,
> > they are:
> > amd_iommu_detect()
> > amd_iommu_prepare()
> > amd_iommu_enable()
> > amd_iommu_init()
> > 
> > And they are called according to above sequence. It means only below 4
> > cases are checked and the code blocks are executed. Then where to call
> > amd_iommu_enable_interrupts() and amd_iommu_init_dma(). Could you help
> > to tell what I missed?
> > 
> > static int __init state_next(void)
> > {
> > 	int ret = 0;
> > 
> > 	switch (init_state) {
> > 	case IOMMU_START_STATE:     //checked and execute
> > 	case IOMMU_IVRS_DETECTED:   //checked and execute
> > 	case IOMMU_ACPI_FINISHED:   //checked and execute
> > 	case IOMMU_ENABLED:         //checked and execute
> > 	...
> > }
> 
> Yes, it is right that only these four states are used as exit-states for
> the functions above. The other states are not really needed, but the
> work done is these steps is. Originally my idea was to use the
> intermedite states to see where initialization failed, but that is
> easier to achieve elsewhere.
> 
> So this has been on my list of things to clean up, just didn't got
> around to do it yet.

Hi Joerg,

Thanks a lot for explanation.

Then I am wondering  how amd_iommu_dma_ops is assigned. Maybe I need
check all functions more clearly. Actually I am investigating how to
port Zhenhua's kdump fix for intel iommu to amd iommu since the similar
bug happened on systems with amd iommu. If you don't mind I can make
these clean up during I understand these iommu codes. And if Zhenhua
plan to post patch for amd fix, I can help review and test. Otherwise I
can make some research and try to post a draft patch.

Thanks
Baoquan


> 
> 
> 	Joerg
> 
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