lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <556CA704.1070000@kernel.org>
Date:	Mon, 01 Jun 2015 11:40:04 -0700
From:	Andy Lutomirski <luto@...nel.org>
To:	Len Brown <lenb@...nel.org>, x86@...nel.org,
	linux-pm@...r.kernel.org, linux-kernel@...r.kernel.org
CC:	Len Brown <len.brown@...el.com>
Subject: Re: [PATCH 1/1] x86 TSC: set X86_FEATURE_TSC_RELIABLE, per CPUID

On 05/30/2015 10:44 PM, Len Brown wrote:
> From: Len Brown <len.brown@...el.com>
>
> Speed cpu_up() by believing CPUID's "invariant TSC" flag,
> and skipping the TSC warp test on single socket systems.

I'm typing this email on a "Intel(R) Core(TM) i7-3930K CPU @ 3.20GHz" 
with a "X79A-GD65 (8D) (MS-7760)" motherboard.  (DO NOT BUY THAT 
MOTHERBOARD!)

The brilliant stock firmware breaks TSC sync on bootup.  Even with the 
updated firmware I'm using, it's broken on resume from S3.

If you want to make this depend on X86_FEATURE_TSC_ADJUST and confirm 
that all cores have the same IA32_TSC_ADJUST value, then maybe that 
would be okay.  Otherwise, please don't underestimate the malice^Wgross 
incompetence of firmware vendors.

--Andy
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ