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Date:	Tue, 2 Jun 2015 11:19:51 +0200
From:	Maxime Ripard <maxime.ripard@...e-electrons.com>
To:	Vinod Koul <vinod.koul@...el.com>, dmaengine@...r.kernel.org,
	Nicolas Ferre <nicolas.ferre@...el.com>,
	Alexandre Belloni <alexandre.belloni@...e-electrons.com>,
	Thomas Petazzoni <thomas@...e-electrons.com>,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 2/2] dmaengine: hdmac: Implement interleaved transfers

Hi,

On Mon, Jun 01, 2015 at 10:32:16AM +0200, Ludovic Desroches wrote:
> >  	channel_writel(atchan, CTRLA, 0);
> >  	channel_writel(atchan, CTRLB, 0);
> >  	channel_writel(atchan, DSCR, first->txd.phys);
> > +	channel_writel(atchan, SPIP, ATC_SPIP_HOLE(first->src_hole) |
> > +		       ATC_SPIP_BOUNDARY(first->boundary));
> > +	channel_writel(atchan, DPIP, ATC_DPIP_HOLE(first->dst_hole) |
> > +		       ATC_DPIP_BOUNDARY(first->boundary));
> 
> Can't we get a trivial condition to perform these two writes only if
> needed?

Is that really needed?

My understanding is that the hardware will only take this into account
if we set the ATC_SRC_PIP and ATC_DST_PIP bits anyway, so the check is
already there.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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