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Message-ID: <alpine.DEB.2.11.1506022130330.20347@nanos>
Date: Tue, 2 Jun 2015 21:33:25 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Adrian Hunter <adrian.hunter@...el.com>
cc: LKML <linux-kernel@...r.kernel.org>,
Andy Lutomirski <luto@...capital.net>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Andi Kleen <ak@...ux.intel.com>, x86@...nel.org,
"H. Peter Anvin" <hpa@...or.com>, Len Brown <lenb@...nel.org>
Subject: Re: [PATCH RFC] x86, tsc: Allow for high latency in
quick_pit_calibrate()
On Thu, 21 May 2015, Adrian Hunter wrote:
> If it takes longer than 12us to read the PIT counter lsb/msb,
> then the error margin will never fall below 500ppm within 50ms,
> and Fast TSC calibration will always fail.
So finally the legacy PIT emulation takes longer than the 30 years old
hardware implementation. Progress!
> This patch detects when that will happen and switches to using
> a slightly different algorithm that takes advantage of the PIT's
> latch comand.
Is there really no smarter way to figure out the TSC frequency on
modern systems?
Thanks,
tglx
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