linux-kernel - [RFC PATCH] perf: honoring cpuid for number of fixed counters

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Date:	Wed,  3 Jun 2015 10:03:48 +0200
From:	Imre Palik <imrep.amz@...il.com>
To:	Thomas Gleixner <tglx@...utronix.de>,
	"H. Peter Anvin" <hpa@...or.com>, x86@...nel.org
Cc:	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Paul Mackerras <paulus@...ba.org>,
	Ingo Molnar <mingo@...hat.com>,
	Arnaldo Carvalho de Melo <acme@...nel.org>,
	linux-kernel@...r.kernel.org, "Palik, Imre" <imrep@...zon.de>,
	Anthony Liguori <aliguori@...zon.com>
Subject: [RFC PATCH] perf: honoring cpuid for number of fixed counters

From: "Palik, Imre" <imrep@...zon.de>

perf doesn't seem to honor the number of fixed counters specified by cpuid
leaf 0xa.  It always assume that intel CPUs have at least 3 fixed counters.

So if some of the fixed counters are masked out by the hypervisor, it still
tries to check/set them.  This is good for testing the masking code in the
hypervisor, but not so nice otherwise.

This patch makes perf pehave somewhat nicer when the number of fixed
counters is less than three.

Signed-off-by: Imre Palik <imrep@...zon.de>
Cc: Anthony Liguori <aliguori@...zon.com>
---
 arch/x86/kernel/cpu/perf_event.c       |    2 ++
 arch/x86/kernel/cpu/perf_event_intel.c |    7 -------
 2 files changed, 2 insertions(+), 7 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 87848eb..eaa0b5e 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -647,6 +647,8 @@ static void perf_sched_init(struct perf_sched *sched, struct perf_event **events
 	sched->state.event	= idx;		/* start with min weight */
 	sched->state.weight	= wmin;
 	sched->state.unassigned	= num;
+	sched->state.used[0]    =
+		~0UL << (INTEL_PMC_IDX_FIXED + x86_pmu.num_counters_fixed);
 }
 
 static void perf_sched_save_state(struct perf_sched *sched)
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 3998131..60beb98 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -3042,13 +3042,6 @@ __init int intel_pmu_init(void)
 
 	x86_pmu.max_pebs_events		= min_t(unsigned, MAX_PEBS_EVENTS, x86_pmu.num_counters);
 
-	/*
-	 * Quirk: v2 perfmon does not report fixed-purpose events, so
-	 * assume at least 3 events:
-	 */
-	if (version > 1)
-		x86_pmu.num_counters_fixed = max((int)edx.split.num_counters_fixed, 3);
-
 	if (boot_cpu_has(X86_FEATURE_PDCM)) {
 		u64 capabilities;
 
-- 
1.7.9.5

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