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Message-ID: <CAD=FV=XGOVpAA5+NQ8O910T=CPrYKfTseBXfNbR4EkenzDECaQ@mail.gmail.com>
Date: Fri, 5 Jun 2015 13:55:20 -0700
From: Doug Anderson <dianders@...omium.org>
To: Caesar Wang <wxt@...k-chips.com>
Cc: Heiko Stuebner <heiko@...ech.de>,
Dmitry Torokhov <dmitry.torokhov@...il.com>,
"open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
Russell King <linux@....linux.org.uk>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 1/3] ARM: rockchip: fix the CPU soft reset
Caesar,
On Fri, Jun 5, 2015 at 10:05 AM, Caesar Wang <wxt@...k-chips.com> wrote:
> + if (!on)
> + reset_control_assert(rstc);
> +
> + ret = regmap_update_bits(pmu, PMU_PWRDN_CON, BIT(pd), val);
> + if (ret < 0) {
> + pr_err("%s: could not update power domain\n", __func__);
> + reset_control_put(rstc);
> + return ret;
> + }
> +
> if (on)
> reset_control_deassert(rstc);
> - else
> - reset_control_assert(rstc);
As Heiko indicated in the previous patchset, he thought it would be
nice to move the 'pmu_power_domain_is_on(pd)' to before you deasserted
reset. ...but then I pointed out that you tested that in patch set #2
and it didn't work.
Talking to Heiko offline he thought that perhaps you could make
'pmu_power_domain_is_on(pd)' work if you increased your 'udelay(10);'
in rockchip_boot_secondary(). Perhaps the old
'pmu_power_domain_is_on' was acting like an extra bit of delay and
that's why moving it broke things.
I actually went back and tested patch set #2 and it worked for me, so
I couldn't test Heiko's theory. Could you go and reproduce the
problem with patch set #2 again and then try increasing the udelay()
and see if your problems go away? If that works, it might be a
slightly better solution. Note that I think Heiko had a slightly
cleaner version of your patch set #2 that he posted in response to
your patch set #3.
-Doug
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