linux-kernel - Re: [PATCH 1/3] MIPS: R6: Use lightweight SYNC instruction in smp

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Message-ID: <alpine.LFD.2.11.1506052209520.7979@eddie.linux-mips.org>
Date:	Fri, 5 Jun 2015 22:18:41 +0100 (BST)
From:	"Maciej W. Rozycki" <macro@...ux-mips.org>
To:	Ralf Baechle <ralf@...ux-mips.org>
cc:	Leonid Yegoshin <Leonid.Yegoshin@...tec.com>,
	linux-mips@...ux-mips.org, benh@...nel.crashing.org,
	will.deacon@....com, linux-kernel@...r.kernel.org,
	markos.chandras@...tec.com, Steven.Hill@...tec.com,
	alexander.h.duyck@...hat.com,
	"David S. Miller" <davem@...emloft.net>
Subject: Re: [PATCH 1/3] MIPS: R6: Use lightweight SYNC instruction in smp_*
 memory barriers

On Fri, 5 Jun 2015, Ralf Baechle wrote:

> do you have an R4000 / R4600 / R5000 / R7000 / SiByte system at hand to
> test this?

 I should be able to check R4400 (that is virtually the same as R4000) 
next week or so.  As to SiByte -- not before next month I'm afraid.  I 
don't have access to any of the other processors you named.  You may 
want to find a better person if you want to accept this change soon.

  Maciej
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