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Message-Id: <1433637240-24223-3-git-send-email-ddecotig@gmail.com>
Date:	Sat,  6 Jun 2015 17:34:00 -0700
From:	David Decotigny <ddecotig@...il.com>
To:	Oleg Drokin <oleg.drokin@...el.com>,
	Andreas Dilger <andreas.dilger@...el.com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	HPDD-discuss@...ts.01.org, devel@...verdev.osuosl.org,
	linux-kernel@...r.kernel.org
Cc:	Doug Oucharek <doug.s.oucharek@...el.com>,
	Peng Tao <bergwolf@...il.com>,
	Isaac Huang <he.huang@...el.com>,
	Amir Shehata <amir.shehata@...el.com>,
	David Decotigny <ddecotig@...il.com>,
	Liang Zhen <liang.zhen@...el.com>
Subject: [PATCH v2 2/2] staging: rtl8723au: core: remove redundant endianness conversion

Source and destination have the same little-endian annotation: this
patch removes forced conversion from host byte order to little-endian.

This addresses the following sparse warning:
drivers/staging/rtl8723au/core/rtw_mlme_ext.c:3911:56: warning: incorrect type in argument 1 (different base types)
drivers/staging/rtl8723au/core/rtw_mlme_ext.c:3911:56:    expected unsigned short [unsigned] [usertype] val
drivers/staging/rtl8723au/core/rtw_mlme_ext.c:3911:56:    got restricted __le16 [usertype] BA_timeout_value

Signed-off-by: David Decotigny <ddecotig@...il.com>
---
 drivers/staging/rtl8723au/core/rtw_mlme_ext.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/rtl8723au/core/rtw_mlme_ext.c b/drivers/staging/rtl8723au/core/rtw_mlme_ext.c
index 7c3b5dd..142f214 100644
--- a/drivers/staging/rtl8723au/core/rtw_mlme_ext.c
+++ b/drivers/staging/rtl8723au/core/rtw_mlme_ext.c
@@ -3906,8 +3906,8 @@ void issue_action_BA23a(struct rtw_adapter *padapter,
 		put_unaligned_le16(BA_para_set,
 				   &mgmt->u.action.u.addba_resp.capab);
 
-		put_unaligned_le16(pmlmeinfo->ADDBA_req.BA_timeout_value,
-				   &mgmt->u.action.u.addba_resp.timeout);
+		mgmt->u.action.u.addba_resp.timeout
+			= pmlmeinfo->ADDBA_req.BA_timeout_value;
 
 		pattrib->pktlen += 8;
 		break;
-- 
2.2.0.rc0.207.ga3a616c

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