linux-kernel - [tip:x86/apic] iommu, x86: Implement irq_set_vcpu_affinity for intel_ir

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Message-ID: <tip-d6b9ad3ae95f21b92090f484c5629f710424c6e3@git.kernel.org>
Date:	Mon, 8 Jun 2015 06:43:50 -0700
From:	tip-bot for Feng Wu <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, tglx@...utronix.de,
	feng.wu@...el.com, David.Woodhouse@...el.com, hpa@...or.com,
	mingo@...nel.org, jiang.liu@...ux.intel.com
Subject: [tip:x86/apic] iommu, x86:
  Implement irq_set_vcpu_affinity for intel_ir_chip

Commit-ID:  d6b9ad3ae95f21b92090f484c5629f710424c6e3
Gitweb:     http://git.kernel.org/tip/d6b9ad3ae95f21b92090f484c5629f710424c6e3
Author:     Feng Wu <feng.wu@...el.com>
AuthorDate: Fri, 5 Jun 2015 13:42:48 +0800
Committer:  Thomas Gleixner <tglx@...utronix.de>
CommitDate: Mon, 8 Jun 2015 15:41:32 +0200

iommu, x86: Implement irq_set_vcpu_affinity for intel_ir_chip

Interrupt chip callback to set the VCPU affinity for posted interrupts.

[ tglx: Use the helper function to copy from the remap irte instead of
  	open coding it. Massage the comment as well ]

Signed-off-by: Feng Wu <feng.wu@...el.com>
Reviewed-by: Jiang Liu <jiang.liu@...ux.intel.com>
Acked-by: David Woodhouse <David.Woodhouse@...el.com>
Cc: iommu@...ts.linux-foundation.org
Cc: joro@...tes.org
Cc: dwmw2@...radead.org
Link: http://lkml.kernel.org/r/1433482974-14614-4-git-send-email-feng.wu@intel.com
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
---
 arch/x86/include/asm/irq_remapping.h |  5 +++++
 drivers/iommu/intel_irq_remapping.c  | 37 ++++++++++++++++++++++++++++++++++++
 2 files changed, 42 insertions(+)

diff --git a/arch/x86/include/asm/irq_remapping.h b/arch/x86/include/asm/irq_remapping.h
index 0953723..202e040 100644
--- a/arch/x86/include/asm/irq_remapping.h
+++ b/arch/x86/include/asm/irq_remapping.h
@@ -57,6 +57,11 @@ static inline struct irq_domain *arch_get_ir_parent_domain(void)
 	return x86_vector_domain;
 }
 
+struct vcpu_data {
+	u64 pi_desc_addr;	/* Physical address of PI Descriptor */
+	u32 vector;		/* Guest vector of the interrupt */
+};
+
 #else  /* CONFIG_IRQ_REMAP */
 
 static inline void set_irq_remapping_broken(void) { }
diff --git a/drivers/iommu/intel_irq_remapping.c b/drivers/iommu/intel_irq_remapping.c
index 8fad71c..a643eec 100644
--- a/drivers/iommu/intel_irq_remapping.c
+++ b/drivers/iommu/intel_irq_remapping.c
@@ -1013,10 +1013,47 @@ static void intel_ir_compose_msi_msg(struct irq_data *irq_data,
 	*msg = ir_data->msi_entry;
 }
 
+static int intel_ir_set_vcpu_affinity(struct irq_data *data, void *info)
+{
+	struct intel_ir_data *ir_data = data->chip_data;
+	struct vcpu_data *vcpu_pi_info = info;
+
+	/* stop posting interrupts, back to remapping mode */
+	if (!vcpu_pi_info) {
+		modify_irte(&ir_data->irq_2_iommu, &ir_data->irte_entry);
+	} else {
+		struct irte irte_pi;
+
+		/*
+		 * We are not caching the posted interrupt entry. We
+		 * copy the data from the remapped entry and modify
+		 * the fields which are relevant for posted mode. The
+		 * cached remapped entry is used for switching back to
+		 * remapped mode.
+		 */
+		memset(&irte_pi, 0, sizeof(irte_pi));
+		dmar_copy_shared_irte(&irte_pi, &ir_data->irte_entry);
+
+		/* Update the posted mode fields */
+		irte_pi.p_pst = 1;
+		irte_pi.p_urgent = 0;
+		irte_pi.p_vector = vcpu_pi_info->vector;
+		irte_pi.pda_l = (vcpu_pi_info->pi_desc_addr >>
+				(32 - PDA_LOW_BIT)) & ~(-1UL << PDA_LOW_BIT);
+		irte_pi.pda_h = (vcpu_pi_info->pi_desc_addr >> 32) &
+				~(-1UL << PDA_HIGH_BIT);
+
+		modify_irte(&ir_data->irq_2_iommu, &irte_pi);
+	}
+
+	return 0;
+}
+
 static struct irq_chip intel_ir_chip = {
 	.irq_ack = ir_ack_apic_edge,
 	.irq_set_affinity = intel_ir_set_affinity,
 	.irq_compose_msi_msg = intel_ir_compose_msi_msg,
+	.irq_set_vcpu_affinity = intel_ir_set_vcpu_affinity,
 };
 
 static void intel_irq_remapping_prepare_irte(struct intel_ir_data *data,
--
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