linux-kernel - [PATCH 4/8]powerpc/perf: Add Power8 mem

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Message-Id: <1434012217-9776-5-git-send-email-maddy@linux.vnet.ibm.com>
Date:	Thu, 11 Jun 2015 14:13:33 +0530
From:	Madhavan Srinivasan <maddy@...ux.vnet.ibm.com>
To:	benh@...nel.crashing.org, paulus@...ba.org, mpe@...erman.id.au
Cc:	linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org,
	sukadev@...ux.vnet.ibm.com, eranian@...gle.com,
	khandual@...ux.vnet.ibm.com, rusty@...tcorp.com.au,
	Madhavan Srinivasan <maddy@...ux.vnet.ibm.com>
Subject: [PATCH 4/8]powerpc/perf: Add Power8 mem_access event to sysfs

Patch add "mem_access" event to sysfs. This as-is not a raw event
supported by Power8 pmu. Instead, it is formed based on
raw event encoding specificed in Power8-pmu.c.

Primary PMU event used here is PM_MRK_INST_CMPL.
This event tracks only the completed marked instructions.

Random sampling mode (MMCRA[SM]) with Random Load/Store
Facility Sampling (RLS) is enabled to mark type of instructions.

With Random sampling in RLS mode with PM_MRK_INST_CMPL event
on Power8, the LDST field in SIER identifies the memory
hierarchy level (eg: L1, L2 etc), from which a data-cache
miss for a marked instruction are satisfied.

Reviewed-by: Sukadev Bhattiprolu <sukadev@...ux.vnet.ibm.com>
Signed-off-by: Madhavan Srinivasan <maddy@...ux.vnet.ibm.com>
---
 arch/powerpc/perf/power8-events-list.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/powerpc/perf/power8-events-list.h b/arch/powerpc/perf/power8-events-list.h
index 1368547..fdb8ce2 100644
--- a/arch/powerpc/perf/power8-events-list.h
+++ b/arch/powerpc/perf/power8-events-list.h
@@ -18,3 +18,4 @@ EVENT(PM_CMPLU_STALL,			0x4000a)
 EVENT(PM_INST_CMPL,			0x00002)
 EVENT(PM_BRU_FIN,			0x10068)
 EVENT(PM_BR_MPRED_CMPL,			0x400f6)
+EVENT(mem_access,			0x100010401e0)
-- 
1.9.1

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