linux-kernel - Re: [RFC/RFT PATCH v2] PCI: move pci_read_bridge

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Message-ID: <20150613014755.GA29649@roeck-us.net>
Date:	Fri, 12 Jun 2015 18:47:55 -0700
From:	Guenter Roeck <linux@...ck-us.net>
To:	Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Cc:	linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
	Ralf Baechle <ralf@...ux-mips.org>,
	"James E.J. Bottomley" <jejb@...isc-linux.org>,
	Michael Ellerman <mpe@...erman.id.au>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Richard Henderson <rth@...ddle.net>,
	Benjamin Herrenschmidt <benh@...nel.crashing.org>,
	David Howells <dhowells@...hat.com>,
	Russell King <linux@....linux.org.uk>,
	Tony Luck <tony.luck@...el.com>,
	"David S. Miller" <davem@...emloft.net>,
	Ingo Molnar <mingo@...hat.com>,
	Michal Simek <monstr@...str.eu>,
	Chris Zankel <chris@...kel.net>, Arnd Bergmann <arnd@...db.de>,
	Krzysztof Halasa <khalasa@...p.pl>,
	Phil Edworthy <phil.edworthy@...esas.com>,
	Jason Gunthorpe <jgunthorpe@...idianresearch.com>,
	Jingoo Han <jg1.han@...sung.com>,
	Lucas Stach <l.stach@...gutronix.de>,
	Simon Horman <horms@...ge.net.au>,
	Minghuan Lian <minghuan.Lian@...escale.com>,
	Murali Karicheri <m-karicheri2@...com>,
	Tanmay Inamdar <tinamdar@....com>,
	Kishon Vijay Abraham I <kishon@...com>,
	Thierry Reding <thierry.reding@...il.com>,
	Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
	Will Deacon <will.deacon@....com>,
	Jayachandran C <jchandra@...adcom.com>,
	Suravee Suthikulpanit <Suravee.Suthikulpanit@....com>
Subject: Re: [RFC/RFT PATCH v2] PCI: move pci_read_bridge_bases to the
 generic PCI layer

On Tue, Jun 09, 2015 at 10:01:45AM +0100, Lorenzo Pieralisi wrote:
> When a PCI bus is scanned, upon PCI bridge detection the kernel
> has to read the bridge registers to set-up its resources so that
> the PCI resource hierarchy can be validated properly.
> 
> Most if not all architectures read PCI bridge registers in the
> pcibios_fixup_bus hook, that is called by the PCI generic layer
> whenever a PCI bus is scanned.
> 
> Since pci_read_bridge_bases is an arch agnostic operation (and it
> is carried out on all architectures) it can be moved to the generic
> PCI layer in order to consolidate code and remove the respective
> calls from the architectures back-ends.
> 
> The PCI_PROBE_ONLY flag is not checked before calling
> pci_read_bridge_buses in the generic layer since reading the bridge
> bases is not related to resources assignment; this implies that it
> can be carried out safely on PCI_PROBE_ONLY systems too and should
> not affect architectures (alpha, mips) that check the PCI_PROBE_ONLY
> flag before reading the bridge bases.
> 
> In order to validate the resource hierarchy as soon as the resources
> themselves are probed (ie read from the bridge), this patch also adds
> code to pci_read_bridge_bases that claims the bridge resources, so that
> they are validated and inserted in the resource hierarchy as soon as
> the bridge bases are probed.
> 

Hi Lorenzo,

on one of our systems, I see a lot of messages with your patch applied.

bart kernel: pci 0000:b0:00.0: can't claim BAR 7 [io 0x0000-0x0fff]: no compatible bridge window
bart kernel: pci 0000:b0:00.0: can't claim BAR 8 [mem 0x94000000-0x941fffff]: no compatible bridge window
bart kernel: pci 0000:b1:03.0: can't claim BAR 7 [io 0x0000-0x0fff]: no compatible bridge window
bart kernel: pci 0000:b1:03.0: can't claim BAR 8 [mem 0x95800000-0x959fffff]: no compatible bridge window

and so on. The final IO memory assignment is the same, though,
before and after your patch.

      95800000-95bfffff : PCI Bus 0000:b0
        95800000-959fffff : PCI Bus 0000:b1
	  95800000-959fffff : PCI Bus 0000:b2
	95a00000-95a3ffff : 0000:b0:00.0


Does that have any relevance or is it just nuisance messages ?

Thanks,
Guenter
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