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Message-ID: <1434334224.18080.1.camel@mtksdaap41>
Date: Mon, 15 Jun 2015 10:10:24 +0800
From: James Liao <jamesjj.liao@...iatek.com>
To: Matthias Brugger <matthias.bgg@...il.com>
CC: Mike Turquette <mturquette@...aro.org>,
Stephen Boyd <sboyd@...eaurora.org>,
<srv_heupstream@...iatek.com>,
Eddie Huang <eddie.huang@...iatek.com>,
Henry Chen <henryc.chen@...iatek.com>,
"Yingjoe Chen" <yingjoe.chen@...iatek.com>,
Daniel Kurtz <djkurtz@...omium.org>,
Ricky Liang <jcliang@...omium.org>,
Rob Herring <robh+dt@...nel.org>,
Sascha Hauer <kernel@...gutronix.de>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
<linux-mediatek@...ts.infradead.org>
Subject: Re: [PATCH 4/5] clk: mediatek: Add subsystem clocks of MT8173
On Fri, 2015-06-12 at 19:09 +0200, Matthias Brugger wrote:
> On Thursday, May 21, 2015 03:12:55 PM James Liao wrote:
> > +
> > +static struct mtk_gate_regs venclt_cg_regs = {
> > + .set_ofs = 0x0004,
> > + .clr_ofs = 0x0008,
> > + .sta_ofs = 0x0000,
> > +};
>
>
> The register for imagesys, vencsys and vencltsys have all the same offset.
> We could use just one struct for all of them.
OK. I'll merge them in next patch.
Best regards,
James
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