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Message-ID: <alpine.DEB.2.10.1506151004420.3447@vshiva-Udesk>
Date:	Mon, 15 Jun 2015 14:44:32 -0700 (PDT)
From:	Vikas Shivappa <vikas.shivappa@...el.com>
To:	Peter Zijlstra <peterz@...radead.org>
cc:	Vikas Shivappa <vikas.shivappa@...ux.intel.com>,
	linux-kernel@...r.kernel.org, vikas.shivappa@...el.com,
	x86@...nel.org, hpa@...or.com, tglx@...utronix.de,
	mingo@...nel.org, Matt Fleming <matt.fleming@...el.com>,
	"Juvva, Kanaka D" <kanaka.d.juvva@...el.com>,
	"Williamson, Glenn P" <glenn.p.williamson@...el.com>,
	"Auld, Will" <will.auld@...el.com>
Subject: Re: [PATCH 10/10] x86/intel_rdt: Intel haswell Cache Allocation
 enumeration



On Mon, 15 Jun 2015, Peter Zijlstra wrote:

> On Fri, Jun 12, 2015 at 11:17:17AM -0700, Vikas Shivappa wrote:
>> +	/*
>> +	 * Probe test for Haswell CPUs.
>> +	 */
>> +	if (c->x86 == 0x6 && c->x86_model == 0x3f)
>> +		return hsw_probetest();
>
> Firstly, isn't a probe already a test?

Will fix the name to hsw_probe

>
> Secondly, there's more HSW models:
>
>        case 60: /* 22nm Haswell Core */
>        case 63: /* 22nm Haswell Server */
>        case 69: /* 22nm Haswell ULT */
>        case 70: /* 22nm Haswell + GT3e (Intel Iris Pro graphics) */
>
> Is this really only HSW server,

Yes , this probe is only targeted at HSW servers as of now.

or should they all be listed?
>
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