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Message-ID: <alpine.DEB.2.11.1506161022420.4120@nanos>
Date: Tue, 16 Jun 2015 10:23:44 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Vikas Shivappa <vikas.shivappa@...el.com>
cc: Peter Zijlstra <peterz@...radead.org>,
Vikas Shivappa <vikas.shivappa@...ux.intel.com>,
linux-kernel@...r.kernel.org, x86@...nel.org, hpa@...or.com,
mingo@...nel.org, Matt Fleming <matt.fleming@...el.com>,
"Juvva, Kanaka D" <kanaka.d.juvva@...el.com>,
"Williamson, Glenn P" <glenn.p.williamson@...el.com>,
"Auld, Will" <will.auld@...el.com>
Subject: Re: [PATCH 10/10] x86/intel_rdt: Intel haswell Cache Allocation
enumeration
On Mon, 15 Jun 2015, Vikas Shivappa wrote:
> On Mon, 15 Jun 2015, Peter Zijlstra wrote:
>
> > On Fri, Jun 12, 2015 at 11:17:17AM -0700, Vikas Shivappa wrote:
> > > + /*
> > > + * Probe test for Haswell CPUs.
> > > + */
> > > + if (c->x86 == 0x6 && c->x86_model == 0x3f)
> > > + return hsw_probetest();
> >
> > Firstly, isn't a probe already a test?
>
> Will fix the name to hsw_probe
>
> >
> > Secondly, there's more HSW models:
> >
> > case 60: /* 22nm Haswell Core */
> > case 63: /* 22nm Haswell Server */
> > case 69: /* 22nm Haswell ULT */
> > case 70: /* 22nm Haswell + GT3e (Intel Iris Pro graphics) */
> >
> > Is this really only HSW server,
>
> Yes , this probe is only targeted at HSW servers as of now.
>
> or should they all be listed?
you should know, whether they support that feature and need that quirk,
Thanks
tglx
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