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Date:	Thu, 18 Jun 2015 13:31:13 +0530
From:	Keerthy <j-keerthy@...com>
To:	<linux-omap@...r.kernel.org>
CC:	<galak@...eaurora.org>, <tony@...mide.com>, <t-kristo@...com>,
	<pawel.moll@....com>, <linux-kernel@...r.kernel.org>,
	<bcousson@...libre.com>, <linux-clk@...r.kernel.org>,
	<j-keerthy@...com>
Subject: [PATCH 2/2] ARM: dts: am4372: Set the default clock rate for dpll_clksel_mac_clk clock

cpsw needs the clock to be running at 50MHz in kernel. Hence setting
the default rate.

Signed-off-by: Keerthy <j-keerthy@...com>
---
 arch/arm/boot/dts/am4372.dtsi | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index c80a3e2..1680602 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -521,8 +521,11 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ti,hwmods = "cpgmac0";
-			clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
-			clock-names = "fck", "cpts";
+			clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
+				 <&dpll_clksel_mac_clk>;
+			clock-names = "fck", "cpts", "50mclk";
+			assigned-clocks = <&dpll_clksel_mac_clk>;
+			assigned-clock-rates = <50000000>;
 			status = "disabled";
 			cpdma_channels = <8>;
 			ale_entries = <1024>;
-- 
1.9.1

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