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Message-ID: <1434647449-5393-1-git-send-email-vitalya@ti.com>
Date:	Thu, 18 Jun 2015 13:10:49 -0400
From:	Vitaly Andrianov <vitalya@...com>
To:	<linus.walleij@...aro.org>, <gnurou@...il.com>,
	<linux-kernel@...r.kernel.org>, <linux-gpio@...r.kernel.org>
CC:	Vitaly Andrianov <vitalya@...com>, Reece Pollack <x0183204@...com>
Subject: [PATCH] gpio/davinci: add interrupt support for GPIOs 16-31

Interrupts for GPIOs 16 through 31 are enabled by bit 1 in the
"binten" register (offset 8). Previous versions of GPIO only
used bit 0, which enables GPIO 0-15 interrupts.

Signed-off-by: Reece Pollack <x0183204@...com>
Signed-off-by: Vitaly Andrianov <vitalya@...com>
---
 drivers/gpio/gpio-davinci.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
index c5e05c8..c90629f 100644
--- a/drivers/gpio/gpio-davinci.c
+++ b/drivers/gpio/gpio-davinci.c
@@ -546,6 +546,8 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
 		chips[0].gpio_irq = bank_irq;
 		chips[0].gpio_unbanked = pdata->gpio_unbanked;
 		binten = BIT(0);
+		if (pdata->gpio_unbanked > 16)
+			binten |= BIT(1);
 
 		/* AINTC handles mask/unmask; GPIO handles triggering */
 		irq = bank_irq;
-- 
1.9.1

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