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Message-ID: <alpine.DEB.2.11.1506190150000.4107@nanos>
Date:	Fri, 19 Jun 2015 01:52:10 +0200 (CEST)
From:	Thomas Gleixner <tglx@...utronix.de>
To:	"majun (F)" <majun258@...wei.com>
cc:	Catalin.Marinas@....com, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, Will.Deacon@....com,
	mark.rutland@....com, marc.zyngier@....com, jason@...edaemon.net,
	lizefan@...wei.com, huxinwei@...wei.com,
	dingtianhong <dingtianhong@...wei.com>,
	吴云 <wuyun.wu@...wei.com>,
	赵俊化 <zhaojunhua@...ilicon.com>,
	"Liguozhu (Kenneth)" <liguozhu@...ilicon.com>,
	许威 <xuwei5@...ilicon.com>,
	chenwei <wei.chenwei@...ilicon.com>
Subject: Re: [PATCH v2 2/3] IRQ/Gic-V3: Change arm-gic-its to support the
 Mbigen interrupt

On Mon, 15 Jun 2015, majun (F) wrote:
> 在 2015/6/12 18:48, Thomas Gleixner 写道:
> > Can you please provide a proper description of this mbigen chip and
> > explain WHY you think that it needs all this special hackery?

You carefully avoided to provide a proper description of this mbigen
chip and how it needs to be integrated into the GIC/ITS whatever
scenario.

Thanks,

	tglx

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