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Message-ID: <5585D10C.5090804@nod.at>
Date:	Sat, 20 Jun 2015 22:46:04 +0200
From:	Richard Weinberger <richard@....at>
To:	ssantosh@...nel.org
CC:	linux-kernel@...r.kernel.org, d.walter@...0.at,
	"akpm@...ux-foundation.org" <akpm@...ux-foundation.org>
Subject: Re: [PATCH] ddr: Use less generic identifiers

Am 04.05.2015 um 20:44 schrieb Richard Weinberger:
> Am 04.01.2015 um 16:48 schrieb Richard Weinberger:
>> At least on UML this identifiers clash with register names.
>> Use something less generic than Rx, Cx and Cx.
>>
>>   CC      lib//jedec_ddr_data.o
>> In file included from ./arch/um/include/asm/ptrace-generic.h:11:0,
>>                  from ./arch/x86/um/asm/ptrace.h:8,
>>                  from ./arch/x86/include/asm/alternative.h:8,
>>                  from ./arch/x86/include/asm/bitops.h:16,
>>                  from include/linux/bitops.h:36,
>>                  from include/linux/kernel.h:10,
>>                  from include/linux/list.h:8,
>>                  from include/linux/module.h:9,
>>                  from lib//jedec_ddr_data.c:14:
>> ./arch/x86/include/uapi/asm/ptrace-abi.h:28:0: warning: "R15" redefined [enabled by default]
>>  #define R15 0
>>
>> Signed-off-by: Richard Weinberger <richard@....at>
>> ---
>> Please note that this patch is untested.
>>
>> Thanks,
>> //richard
>> ---
>>  drivers/memory/emif.c      |  4 ++--
>>  include/memory/jedec_ddr.h | 36 ++++++++++++++++++------------------
>>  lib/jedec_ddr_data.c       | 20 ++++++++++----------
>>  3 files changed, 30 insertions(+), 30 deletions(-)
>>
>> diff --git a/drivers/memory/emif.c b/drivers/memory/emif.c
>> index 04644e7..e0aa09f 100644
>> --- a/drivers/memory/emif.c
>> +++ b/drivers/memory/emif.c
>> @@ -439,7 +439,7 @@ static u32 get_sdram_tim_1_shdw(const struct lpddr2_timings *timings,
>>  	val = max(min_tck->tWTR, DIV_ROUND_UP(timings->tWTR, t_ck)) - 1;
>>  	tim1 |= val << T_WTR_SHIFT;
>>  
>> -	if (addressing->num_banks == B8)
>> +	if (addressing->num_banks == DDR_BANK_8)
>>  		val = DIV_ROUND_UP(timings->tFAW, t_ck*4);
>>  	else
>>  		val = max(min_tck->tRRD, DIV_ROUND_UP(timings->tRRD, t_ck));
>> @@ -476,7 +476,7 @@ static u32 get_sdram_tim_1_shdw_derated(const struct lpddr2_timings *timings,
>>  	 * tFAW is approximately 4 times tRRD. So add 1875*4 = 7500ps
>>  	 * to tFAW for de-rating
>>  	 */
>> -	if (addressing->num_banks == B8) {
>> +	if (addressing->num_banks == DDR_BANK_8) {
>>  		val = DIV_ROUND_UP(timings->tFAW + 7500, 4 * t_ck) - 1;
>>  	} else {
>>  		val = DIV_ROUND_UP(timings->tRRD + 1875, t_ck);
>> diff --git a/include/memory/jedec_ddr.h b/include/memory/jedec_ddr.h
>> index ddad0f8..39144d0 100644
>> --- a/include/memory/jedec_ddr.h
>> +++ b/include/memory/jedec_ddr.h
>> @@ -40,28 +40,28 @@
>>  #define DDR_IO_WIDTH_32		4
>>  
>>  /* Number of Row bits */
>> -#define R9			9
>> -#define R10			10
>> -#define R11			11
>> -#define R12			12
>> -#define R13			13
>> -#define R14			14
>> -#define R15			15
>> -#define R16			16
>> +#define DDR_ROW_9		9
>> +#define DDR_ROW_10		10
>> +#define DDR_ROW_11		11
>> +#define DDR_ROW_12		12
>> +#define DDR_ROW_13		13
>> +#define DDR_ROW_14		14
>> +#define DDR_ROW_15		15
>> +#define DDR_ROW_16		16
>>  
>>  /* Number of Column bits */
>> -#define C7			7
>> -#define C8			8
>> -#define C9			9
>> -#define C10			10
>> -#define C11			11
>> -#define C12			12
>> +#define DDR_COL_7		7
>> +#define DDR_COL_8		8
>> +#define DDR_COL_9		9
>> +#define DDR_COL_10		10
>> +#define DDR_COL_11		11
>> +#define DDR_COL_12		12
>>  
>>  /* Number of Banks */
>> -#define B1			0
>> -#define B2			1
>> -#define B4			2
>> -#define B8			3
>> +#define DDR_BANK_1		0
>> +#define DDR_BANK_2		1
>> +#define DDR_BANK_4		2
>> +#define DDR_BANK_8		3
>>  
>>  /* Refresh rate in nano-seconds */
>>  #define T_REFI_15_6		15600
>> diff --git a/lib/jedec_ddr_data.c b/lib/jedec_ddr_data.c
>> index 6d2cbf1..2181be4 100644
>> --- a/lib/jedec_ddr_data.c
>> +++ b/lib/jedec_ddr_data.c
>> @@ -16,16 +16,16 @@
>>  /* LPDDR2 addressing details from JESD209-2 section 2.4 */
>>  const struct lpddr2_addressing
>>  	lpddr2_jedec_addressing_table[NUM_DDR_ADDR_TABLE_ENTRIES] = {
>> -	{B4, T_REFI_15_6, T_RFC_90}, /* 64M */
>> -	{B4, T_REFI_15_6, T_RFC_90}, /* 128M */
>> -	{B4, T_REFI_7_8,  T_RFC_90}, /* 256M */
>> -	{B4, T_REFI_7_8,  T_RFC_90}, /* 512M */
>> -	{B8, T_REFI_7_8, T_RFC_130}, /* 1GS4 */
>> -	{B8, T_REFI_3_9, T_RFC_130}, /* 2GS4 */
>> -	{B8, T_REFI_3_9, T_RFC_130}, /* 4G */
>> -	{B8, T_REFI_3_9, T_RFC_210}, /* 8G */
>> -	{B4, T_REFI_7_8, T_RFC_130}, /* 1GS2 */
>> -	{B4, T_REFI_3_9, T_RFC_130}, /* 2GS2 */
>> +	{DDR_BANK_4, T_REFI_15_6, T_RFC_90}, /* 64M */
>> +	{DDR_BANK_4, T_REFI_15_6, T_RFC_90}, /* 128M */
>> +	{DDR_BANK_4, T_REFI_7_8,  T_RFC_90}, /* 256M */
>> +	{DDR_BANK_4, T_REFI_7_8,  T_RFC_90}, /* 512M */
>> +	{DDR_BANK_8, T_REFI_7_8, T_RFC_130}, /* 1GS4 */
>> +	{DDR_BANK_8, T_REFI_3_9, T_RFC_130}, /* 2GS4 */
>> +	{DDR_BANK_8, T_REFI_3_9, T_RFC_130}, /* 4G */
>> +	{DDR_BANK_8, T_REFI_3_9, T_RFC_210}, /* 8G */
>> +	{DDR_BANK_4, T_REFI_7_8, T_RFC_130}, /* 1GS2 */
>> +	{DDR_BANK_4, T_REFI_3_9, T_RFC_130}, /* 2GS2 */
>>  };
>>  EXPORT_SYMBOL_GPL(lpddr2_jedec_addressing_table);
> 
> Ping?
> 

*ping -f*

Thanks,
//richard
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