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Message-ID: <CAMuHMdUCNQV=9vEmNPHtuwXw3jZ_NWwpJaTb6eBXvYJiDKhGaw@mail.gmail.com>
Date:	Wed, 24 Jun 2015 13:07:57 +0200
From:	Geert Uytterhoeven <geert@...ux-m68k.org>
To:	Linus Walleij <linus.walleij@...aro.org>
Cc:	Romain Baeriswyl <romain.baeriswyl@...tech.com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	Alexandre Courbot <gnurou@...il.com>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Christian Ruppert <christian.ruppert@...tech.com>,
	Anton Vorontsov <cbouatmailru@...il.com>,
	Rojhalat Ibrahim <imr@...chenk.de>,
	abdoulaye berthe <berthe.ab@...il.com>,
	Anthony Fee <anthony.fee@...tex.com>,
	Alexander Shiyan <shc_work@...l.ru>
Subject: Re: [PATCH] added device tree support to gpio-generic driver

On Wed, Jun 10, 2015 at 10:42 AM, Linus Walleij
<linus.walleij@...aro.org> wrote:
> On Fri, Jun 5, 2015 at 8:51 AM, Romain Baeriswyl
> <romain.baeriswyl@...tech.com> wrote:
>
>> +Required properties:
>> +- compatible : "basic-mmio-gpio" for little endian register access or
>> +               "basic-mmio-gpio-be" for big endian register access
>
> Basic I don't know.
>
> "single-register-gpio" is more to the point, don't you think?
>
>> +- ngpios: Specifies the number of gpio mapped in the register. The value is
>> +          limited to the number of bits of the LONG type.
>
> So if it is 8 for a 32 bit register, does it mean bits 0..7 little endian or
> big endian, or does it depend on endianness? Clarify this
> in the binding.

LONG can be 64-bit too.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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