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Message-ID: <20150625150918.GA4898@pd.tnic>
Date: Thu, 25 Jun 2015 17:09:18 +0200
From: Borislav Petkov <bp@...e.de>
To: "Luis R. Rodriguez" <mcgrof@...not-panic.com>
Cc: mingo@...nel.org, arnd@...db.de, bhelgaas@...gle.com,
luto@...capital.net, akpm@...ux-foundation.org,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
tomi.valkeinen@...com, mst@...hat.com, toshi.kani@...com,
linux-fbdev@...r.kernel.org, xen-devel@...ts.xensource.com,
benh@...nel.crashing.org, "Luis R. Rodriguez" <mcgrof@...e.com>,
Suresh Siddha <sbsiddha@...il.com>,
Ingo Molnar <mingo@...e.hu>,
Thomas Gleixner <tglx@...utronix.de>,
Juergen Gross <jgross@...e.com>,
Daniel Vetter <daniel.vetter@...ll.ch>,
Dave Airlie <airlied@...hat.com>,
Antonino Daplas <adaplas@...il.com>,
Jean-Christophe Plagniol-Villard <plagnioj@...osoft.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
venkatesh.pallipadi@...el.com,
Stefan Bader <stefan.bader@...onical.com>,
Ville Syrjälä <syrjala@....fi>,
Mel Gorman <mgorman@...e.de>, Vlastimil Babka <vbabka@...e.cz>,
Davidlohr Bueso <dbueso@...e.de>, konrad.wilk@...cle.com,
ville.syrjala@...ux.intel.com, david.vrabel@...rix.com,
jbeulich@...e.com,
Roger Pau Monné <roger.pau@...rix.com>
Subject: Re: [PATCH v8 5/9] PCI: Add pci_iomap_wc() variants
On Wed, Jun 24, 2015 at 06:22:18PM -0700, Luis R. Rodriguez wrote:
> From: "Luis R. Rodriguez" <mcgrof@...e.com>
>
> PCI BARs tell us whether prefetching is safe, but they don't say anything
> about write combining (WC). WC changes ordering rules and allows writes to
> be collapsed, so it's not safe in general to use it on a prefetchable
> region.
>
> Add pci_iomap_wc() and pci_iomap_wc_range() so drivers can take advantage
> of write combining when they know it's safe.
>
> On architectures that don't fully support WC, e.g., x86 without PAT,
> drivers for legacy framebuffers may get some of the benefit by using
> arch_phys_wc_add() in addition to pci_iomap_wc(). But arch_phys_wc_add()
> is unreliable and should be avoided in general. On x86, it uses MTRRs,
> which are limited in number and size, so the results will vary based on
> driver loading order.
>
> The goals of adding pci_iomap_wc() are to:
>
> - Give drivers an architecture-independent way to use WC so they can stop
> using interfaces like mtrr_add() (on x86, pci_iomap_wc() uses
> PAT when available)
>
> - Move toward using _PAGE_CACHE_MODE_UC, not _PAGE_CACHE_MODE_UC_MINUS,
> on x86 on ioremap_nocache() (see de33c442ed2a ("x86 PAT: fix
> performance drop for glx, use UC minus for ioremap(), ioremap_nocache()
> and pci_mmap_page_range()")
...
> diff --git a/lib/pci_iomap.c b/lib/pci_iomap.c
> index bcce5f1..9604dcb 100644
> --- a/lib/pci_iomap.c
> +++ b/lib/pci_iomap.c
> @@ -52,6 +52,46 @@ void __iomem *pci_iomap_range(struct pci_dev *dev,
> EXPORT_SYMBOL(pci_iomap_range);
>
> /**
> + * pci_iomap_wc_range - create a virtual WC mapping cookie for a PCI BAR
> + * @dev: PCI device that owns the BAR
> + * @bar: BAR number
> + * @offset: map memory at the given offset in BAR
> + * @maxlen: max length of the memory to map
> + *
> + * Using this function you will get a __iomem address to your device BAR.
> + * You can access it using ioread*() and iowrite*(). These functions hide
> + * the details if this is a MMIO or PIO address space and will just do what
> + * you expect from them in the correct way. When possible write combining
> + * is used.
> + *
> + * @maxlen specifies the maximum length to map. If you want to get access to
> + * the complete BAR from offset to the end, pass %0 here.
> + * */
> +void __iomem *pci_iomap_wc_range(struct pci_dev *dev,
> + int bar,
> + unsigned long offset,
> + unsigned long maxlen)
> +{
> + resource_size_t start = pci_resource_start(dev, bar);
> + resource_size_t len = pci_resource_len(dev, bar);
> + unsigned long flags = pci_resource_flags(dev, bar);
> +
> + if (len <= offset || !start)
> + return NULL;
> + len -= offset;
> + start += offset;
> + if (maxlen && len > maxlen)
> + len = maxlen;
> + if (flags & IORESOURCE_IO)
> + return NULL;
I've moved this check at the beginning of the function so that we bail
out before doing the computations above it.
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
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