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Message-ID: <CALCETrXpiMWwiAfbxcKTDYCewrwq-UTwLV+xXTxdOkd+B3G-OQ@mail.gmail.com>
Date:	Sat, 27 Jun 2015 08:52:07 -0700
From:	Andy Lutomirski <luto@...capital.net>
To:	Ingo Molnar <mingo@...nel.org>
Cc:	Prarit Bhargava <prarit@...hat.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"H. Peter Anvin" <hpa@...or.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>, X86 ML <x86@...nel.org>,
	Len Brown <len.brown@...el.com>,
	Dasaratharaman Chandramouli 
	<dasaratharaman.chandramouli@...el.com>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Borislav Petkov <bp@...en8.de>,
	Andy Lutomirski <luto@...nel.org>,
	Denys Vlasenko <dvlasenk@...hat.com>,
	Brian Gerst <brgerst@...il.com>,
	Arnaldo Carvalho de Melo <acme@...radead.org>
Subject: Re: [PATCH] x86, msr: Allow read access to /dev/cpu/X/msr

On Sat, Jun 27, 2015 at 1:39 AM, Ingo Molnar <mingo@...nel.org> wrote:
>
> * Ingo Molnar <mingo@...nel.org> wrote:
>
>> So what's wrong with exposing them as a simplified PMU driver?
>>
>> That way we only expose the ones we want to - plus tooling can use all the rich
>> perf features that can be used around this. (sampling, counting, call chains,
>> etc.)
>
> See below code from Andy that exposes a single MSR via perf. At the core of the
> PMU driver is a single rdmsrl():
>
> +static void aperfmperf_event_start(struct perf_event *event, int flags)
> +{
> +       u64 now;
> +
> +       rdmsrl(event->hw.event_base, now);
> +       local64_set(&event->hw.prev_count, now);
> +}
>
> Now I think what we really want is to expose not a single MSR but multiple MSRs in
> a single driver, i.e. don't have one PMU driver per MSR, but have a driver that
> allows the exposure of select MSRs as counters.

I'm way ahead of you: this driver can expose *two* MSRs as counters :)

Seriously, though, it would be straightforward to make it handle a
more general list, complete with non-architectural stuff (such as the
upcoming PPERF in Skylake).

This driver only knows how to handle counters, though.  I'm not sure
whether all of the MSRs that turbostat needs are counters.

--Andy
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