linux-kernel - Re: [PATCH] mtd: spi-nor: Only set Micron quad-read mode when controller in 4-lane TX mode

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <55937D58.9090102@topic.nl>
Date:	Wed, 1 Jul 2015 07:40:40 +0200
From:	Mike Looijmans <mike.looijmans@...ic.nl>
To:	Graham Moore <grmoore@...nsource.altera.com>
CC:	<linux-mtd@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
	<git@...inx.com>, <computersforpeace@...il.com>,
	<dwmw2@...radead.org>, <beanhuo@...ron.com>
Subject: Re: [PATCH] mtd: spi-nor: Only set Micron quad-read mode when controller
 in 4-lane TX mode

On 30-06-15 17:42, Graham Moore wrote:
> On 06/30/2015 06:17 AM, Mike Looijmans wrote:
>> Micron QUAD mode expects command, address and data on 4 lanes instead of just
>> one for command (extended SPI mode). This requires the controller to be in a
>> special mode, so check first if the controller could be in that mode. If a
>> controller does not have the SPI_TX_QUAD mode set, this setting has no chance
>> of being valid at all, so don't try to enable it then, and just keep using
>> the extended SPI mode.
>>
>> Tested on a Zynq 7000 with a n25q256a flash chip, this failed to function
>> because of the introduction of:
>> "driver:mtd:spi-nor: Add quad I/O support for Micron spi nor"
>> This commit sets QUAD mode for most Micron chips without asking the controller
>> whether it's possible to do so, and without telling the controller that a
>> different mode is required, so it couldn't work.
>>
>> Signed-off-by: Mike Looijmans <mike.looijmans@...ic.nl>
>> ---
>>   drivers/mtd/spi-nor/spi-nor.c | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>> index e8f6131..10ba94f 100644
>> --- a/drivers/mtd/spi-nor/spi-nor.c
>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> @@ -1398,6 +1398,8 @@ static int set_quad_mode(struct spi_nor *nor, struct
>> flash_info *info)
>>           }
>>           return status;
>>       case CFI_MFR_ST:
>> +        if (!(nor->spi->mode & SPI_TX_QUAD))
>> +            return 0;
>
> This is a great idea, but what codebase are you working from?  My l2-mtd tree
> doesn't have a 'spi' member of spi_nor, and this case statement is around line
> 977, not 1398.

I was working from the Xilinx kernel tree, and there's a lot of changes there. 
The one that added the "struct spi_device* spi" to the nor struct is:
63697f5cf9a6201556947ef0ea29442843e5ba61 mtd: spi-nor: Changes for stacked and 
parallel

>>           status = micron_quad_enable(nor);
>>           if (status) {
>>               dev_err(nor->dev, "Micron quad-read not enabled\n");
>>




Kind regards,

Mike Looijmans
System Expert

TOPIC Embedded Products
Eindhovenseweg 32-C, NL-5683 KH Best
Postbus 440, NL-5680 AK Best
Telefoon: +31 (0) 499 33 69 79
Telefax: +31 (0) 499 33 69 70
E-mail: mike.looijmans@...icproducts.com
Website: www.topicproducts.com

Please consider the environment before printing this e-mail





--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/