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Message-ID: <1435803489.3526.18.camel@mtksdaap41>
Date: Thu, 2 Jul 2015 10:18:09 +0800
From: James Liao <jamesjj.liao@...iatek.com>
To: Daniel Kurtz <djkurtz@...omium.org>
CC: Matthias Brugger <matthias.bgg@...il.com>,
Mike Turquette <mturquette@...aro.org>,
Stephen Boyd <sboyd@...eaurora.org>,
srv_heupstream <srv_heupstream@...iatek.com>,
Ricky Liang <jcliang@...omium.org>,
Rob Herring <robh+dt@...nel.org>,
Sascha Hauer <kernel@...gutronix.de>,
"open list:OPEN FIRMWARE AND..." <devicetree@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
<linux-mediatek@...ts.infradead.org>,
"Sascha Hauer" <s.hauer@...gutronix.de>
Subject: Re: [PATCH v2 1/4] clk: mediatek: mt8173: Fix enabling of critical
clocks
Hi Daniel,
On Wed, 2015-07-01 at 22:21 +0800, Daniel Kurtz wrote:
> To be precise, it is the CLK_TOP clocks that have CLK_APMIXED PLLs as
> their parents, so we cannot enable the CLK_TOP critical clocks until
> the CLK_APMIXED clocks have all been registered.
>
> Please add something like the above to the commit message.
OK. I'll add them.
>
> >
> > +static struct clk_onecell_data *mt8173_top_clk_data;
> > +static struct clk_onecell_data *mt8173_pll_clk_data;
>
> These globals can be:
> __initdata
>
> > +
> > +static void mtk_clk_enable_critical(void)
>
> And this function is:
>
> static void __init
I'll add them in next patch.
Best regards,
James
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