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Date:	Fri, 3 Jul 2015 19:40:59 +0200 (CEST)
From:	Paul Osmialowski <pawelo@...g.net.pl>
To:	Thomas Gleixner <tglx@...utronix.de>
cc:	Paul Osmialowski <pawelo@...g.net.pl>,
	Arnd Bergmann <arnd@...db.de>,
	linux-arm-kernel@...ts.infradead.org,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Jiri Slaby <jslaby@...e.cz>, Kumar Gala <galak@...eaurora.org>,
	Linus Walleij <linus.walleij@...aro.org>,
	Mark Rutland <mark.rutland@....com>,
	Michael Turquette <mturquette@...libre.com>,
	Pawel Moll <pawel.moll@....com>,
	Rob Herring <robh+dt@...nel.org>,
	Russell King <linux@....linux.org.uk>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Vinod Koul <vinod.koul@...el.com>,
	linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
	linux-gpio@...r.kernel.org, linux-serial@...r.kernel.org,
	devicetree@...r.kernel.org, dmaengine@...r.kernel.org,
	Nicolas Pitre <nicolas.pitre@...aro.org>,
	Sergei Poselenov <sposelenov@...raft.com>,
	Paul Bolle <pebolle@...cali.nl>,
	Jingchang Lu <jingchang.lu@...escale.com>,
	Yuri Tikhonov <yur@...raft.com>,
	Rob Herring <r.herring@...escale.com>,
	Geert Uytterhoeven <geert@...ux-m68k.org>,
	Uwe Kleine-Koenig <u.kleine-koenig@...gutronix.de>,
	Alexander Potashev <aspotashev@...raft.com>,
	Frank Li <Frank.Li@...escale.com>,
	Anson Huang <b20788@...escale.com>
Subject: Re: [PATCH v2 3/9] arm: twr-k70f120m: clock driver for Kinetis SoC

Arnd, Thomas,

Thanks for your valuable input and for your patience.

I'm attaching yet another proposal for this clock driver. I've 
flattened the .dts and ensured register access protection. I've also added 
one more clock source (osc0er) and clock gate to it.

Can you comment this one too?

On Fri, 3 Jul 2015, Thomas Gleixner wrote:

> On Thu, 2 Jul 2015, Paul Osmialowski wrote:
>> On Thu, 2 Jul 2015, Arnd Bergmann wrote:
>>
>>> I wonder if you could move out the fixed rate clocks into their own
>>> nodes. Are they actually controlled by the same block? If they are
>>> just fixed, you can use the normal binding for fixed rate clocks
>>> and only describe the clocks that are related to the driver.
>>
>> In my view having these clocks grouped together looks more convincing. After
>> all, they all share the same I/O regs in order to read configuration.
>
> The fact that they share a register is not making them a group. That's
> just a HW design decision and you need to deal with that by protecting
> the register access, but not by trying to group them artificially at
> the functional level.
>
> Thanks,
>
> 	tglx
>
View attachment "0003-arm-twr-k70f120m-clock-driver-for-Kinetis-SoC.patch" of type "TEXT/x-diff" (19961 bytes)

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