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Message-ID: <1436191925.7757.2.camel@mtksdaap41>
Date: Mon, 6 Jul 2015 22:12:05 +0800
From: YH Huang <yh.huang@...iatek.com>
To: Daniel Kurtz <djkurtz@...omium.org>
CC: Matthias Brugger <matthias.bgg@...il.com>,
Mark Rutland <mark.rutland@....com>,
Thierry Reding <thierry.reding@...il.com>,
"Rob Herring" <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>, <linux-pwm@...r.kernel.org>,
"open list:OPEN FIRMWARE AND..." <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
srv_heupstream <srv_heupstream@...iatek.com>,
<linux-mediatek@...ts.infradead.org>,
"Sascha Hauer" <kernel@...gutronix.de>,
Yingjoe Chen <yingjoe.chen@...iatek.com>
Subject: Re: [PATCH v4 3/3] arm64: dts: mt8173: add MT8173 display PWM
driver support dtsi
On Mon, 2015-07-06 at 21:38 +0800, Daniel Kurtz wrote:
> On Mon, Jul 6, 2015 at 9:29 PM, YH Huang <yh.huang@...iatek.com> wrote:
> > Add display PWM node in mt8173.dtsi.
> >
> > Signed-off-by: YH Huang <yh.huang@...iatek.com>
> > ---
> > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 22 ++++++++++++++++++++++
> > 1 file changed, 22 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > index 0696f8f..e4ffd9d 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > @@ -393,6 +393,28 @@
> > #size-cells = <0>;
> > status = "disabled";
> > };
> > +
> > + pwm0: pwm@...1e000 {
> > + compatible = "mediatek,mt8173-disp-pwm",
> > + "mediatek,mt6595-disp-pwm";
> > + reg = <0 0x1401e000 0 0x1000>;
> > + #pwm-cells = <2>;
> > + clocks = <&mmsys MM_DISP_PWM026M>,
> > + <&mmsys MM_DISP_PWM0MM>;
>
> CLK_MM_DISP_PWM026M
>
Sorry for this terrible mistake.
CLK_MM_DISP_PWM026M
CLK_MM_DISP_PWM0MM
> > + clock-names = "main", "mm";
> > + status = "disabled";
> > + };
> > +
> > + pwm1: pwm@...1f000 {
> > + compatible = "mediatek,mt8173-disp-pwm",
> > + "mediatek,mt6595-disp-pwm";
> > + reg = <0 0x1401f000 0 0x1000>;
> > + #pwm-cells = <2>;
> > + clocks = <&mmsys MM_DISP_PWM126M>,
> > + <&mmsys MM_DISP_PWM1MM>;
Same here.
CLK_MM_DISP_PWM126M
CLK_MM_DISP_PWM1MM
Regards,
YH Huang
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