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Message-ID: <CADaLNDmpkdHT7B1fSEu9qtoVcj4ookvxh=BA4EUCvG=pp80s=A@mail.gmail.com>
Date:	Mon, 6 Jul 2015 16:28:43 -0700
From:	Duc Dang <dhdang@....com>
To:	Bjorn Helgaas <bhelgaas@...gle.com>,
	Catalin Marinas <catalin.marinas@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Pawel Moll <pawel.moll@....com>,
	Rob Herring <robh+dt@...nel.org>,
	Mark Rutland <mark.rutland@....com>,
	Kumar Gala <galak@...eaurora.org>,
	Will Deacon <will.deacon@....com>,
	"David S. Miller" <davem@...emloft.net>,
	Arnd Bergmann <arnd@...db.de>
Cc:	devicetree@...r.kernel.org, linux-pci@...r.kernel.org,
	linux-arm <linux-arm-kernel@...ts.infradead.org>,
	linux-kernel@...r.kernel.org, Tanmay Inamdar <tinamdar@....com>,
	patches <patches@....com>, Duc Dang <dhdang@....com>
Subject: Re: [PATCH v2 0/2] pci: xgene: Add multiple memory ranges support

On Tue, Jun 30, 2015 at 11:22 AM, Duc Dang <dhdang@....com> wrote:
> This patch set adds 1 large (up to 64GB) memory window for each PCIe
> controller nodes in X-Gene device tree and fix PCIe controller driver
> to handle multiple memory ranges correctly. These changes are required
> to support PCIe devices that has huge BAR.
>
> v2 changes:
>         1. Separate device-tree changes and driver changes into different
>         patches
>         2. Explicitly define new large window as 64-bit prefetchable in dts
>         3. Use IORESOURCE_PREFETCH flag to determine which PCIe controller
>         register to be used to configure the memory ranges.
>
>  arch/arm64/boot/dts/apm/apm-storm.dtsi | 23 ++++++++++++++---------
>  drivers/pci/host/pci-xgene.c           | 12 ++++++++++--
>  2 files changed, 24 insertions(+), 11 deletions(-)

Hi Arnd, Bjorn,

Do you have additional comment on this v2 patch set?

>
> --
> 1.9.1
>

-- 
Regards,
Duc Dang.
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