linux-kernel - Re: [PATCH] drm/msm/mdp5:Add DMA pipe planes for MDP5

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Message-ID: <CAF6AEGuoqsj5yXRuS-ccUgrd7UuKC7R0fLBHOt1ACSQFSQtLAw@mail.gmail.com>
Date:	Wed, 8 Jul 2015 19:37:50 -0400
From:	Rob Clark <robdclark@...il.com>
To:	Jilai Wang <jilaiw@...eaurora.org>
Cc:	"dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
	linux-arm-msm <linux-arm-msm@...r.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] drm/msm/mdp5:Add DMA pipe planes for MDP5

On Tue, Jul 7, 2015 at 5:17 PM, Jilai Wang <jilaiw@...eaurora.org> wrote:
> This change is to add planes which use DMA pipes for MDP5.

are DMA pipes only supporting memory->memory operation, or am I
reading too much into the name "DMA"?  I'm wondering if we need to fix
the possible_crtcs param that mdp5_plane_init passes to
drm_universal_plane_init()?

BR,
-R


> Signed-off-by: Jilai Wang <jilaiw@...eaurora.org>
> ---
>  drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 23 ++++++++++++++++++++---
>  1 file changed, 20 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
> index cbda41d..f40896d 100644
> --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
> +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
> @@ -316,9 +316,12 @@ static int modeset_init(struct mdp5_kms *mdp5_kms)
>         static const enum mdp5_pipe crtcs[] = {
>                         SSPP_RGB0, SSPP_RGB1, SSPP_RGB2, SSPP_RGB3,
>         };
> -       static const enum mdp5_pipe pub_planes[] = {
> +       static const enum mdp5_pipe vig_planes[] = {
>                         SSPP_VIG0, SSPP_VIG1, SSPP_VIG2, SSPP_VIG3,
>         };
> +       static const enum mdp5_pipe dma_planes[] = {
> +                       SSPP_DMA0, SSPP_DMA1,
> +       };
>         struct drm_device *dev = mdp5_kms->dev;
>         struct msm_drm_private *priv = dev->dev_private;
>         const struct mdp5_cfg_hw *hw_cfg;
> @@ -361,12 +364,26 @@ static int modeset_init(struct mdp5_kms *mdp5_kms)
>         for (i = 0; i < hw_cfg->pipe_vig.count; i++) {
>                 struct drm_plane *plane;
>
> -               plane = mdp5_plane_init(dev, pub_planes[i], false,
> +               plane = mdp5_plane_init(dev, vig_planes[i], false,
>                         hw_cfg->pipe_vig.base[i], hw_cfg->pipe_vig.caps);
>                 if (IS_ERR(plane)) {
>                         ret = PTR_ERR(plane);
>                         dev_err(dev->dev, "failed to construct %s plane: %d\n",
> -                                       pipe2name(pub_planes[i]), ret);
> +                                       pipe2name(vig_planes[i]), ret);
> +                       goto fail;
> +               }
> +       }
> +
> +       /* DMA planes */
> +       for (i = 0; i < hw_cfg->pipe_dma.count; i++) {
> +               struct drm_plane *plane;
> +
> +               plane = mdp5_plane_init(dev, dma_planes[i], false,
> +                       hw_cfg->pipe_dma.base[i], hw_cfg->pipe_dma.caps);
> +               if (IS_ERR(plane)) {
> +                       ret = PTR_ERR(plane);
> +                       dev_err(dev->dev, "failed to construct %s plane: %d\n",
> +                                       pipe2name(dma_planes[i]), ret);
>                         goto fail;
>                 }
>         }
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
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