linux-kernel - Re: [RFC][PATCH 23/24] atomic: Collapse all atomic_{set,clear}

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Date:	Fri, 10 Jul 2015 09:34:04 -0400
From:	Chris Metcalf <cmetcalf@...hip.com>
To:	Peter Zijlstra <peterz@...radead.org>,
	Geert Uytterhoeven <geert@...ux-m68k.org>
CC:	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Linux-Arch <linux-arch@...r.kernel.org>,
	Richard Henderson <rth@...ddle.net>,
	Vineet Gupta <vgupta@...opsys.com>,
	Russell King <linux@....linux.org.uk>,
	Will Deacon <will.deacon@....com>,
	Håvard Skinnemoen <hskinnemoen@...il.com>,
	Miao Steven <realmz6@...il.com>,
	David Howells <dhowells@...hat.com>,
	Richard Kuo <rkuo@...eaurora.org>,
	Tony Luck <tony.luck@...el.com>,
	James Hogan <james.hogan@...tec.com>,
	Ralf Baechle <ralf@...ux-mips.org>,
	"James E.J. Bottomley" <jejb@...isc-linux.org>,
	Benjamin Herrenschmidt <benh@...nel.crashing.org>,
	Heiko Carstens <heiko.carstens@...ibm.com>,
	"David S. Miller" <davem@...emloft.net>,
	Ingo Molnar <mingo@...nel.org>
Subject: Re: [RFC][PATCH 23/24] atomic: Collapse all atomic_{set,clear}_mask
 definitions

On 7/10/2015 6:39 AM, Peter Zijlstra wrote:
> On Fri, Jul 10, 2015 at 11:10:33AM +0200, Geert Uytterhoeven wrote:
>> Hi Peter,
>>
>> On Thu, Jul 9, 2015 at 7:29 PM, Peter Zijlstra <peterz@...radead.org> wrote:
>>> --- a/include/linux/atomic.h
>>> +++ b/include/linux/atomic.h
>>> @@ -28,6 +28,23 @@ static inline int atomic_add_unless(atom
>>>   #define atomic_inc_not_zero(v)         atomic_add_unless((v), 1, 0)
>>>   #endif
>>>
>>> +#ifndef atomic_nand
>>> +static inline void atomic_nand(int i, atomic_t *v)
>>> +{
>>> +       atomic_and(~i, v);
>> That sounds like a misnomer...
>>
>> Your NAND is "A & ~B", while my[*] NAND is "~(A & B)"?
>>
>> [*] https://en.wikipedia.org/wiki/NAND_logic
> Right you are.
>
>> What about atomic_clear()? (Is atomic_bic() too ARM-centric?)
> atomic_and_not() ?

I've seen this as ANDN (as opposed to NAND).  That's the name I used in
the tilepro atomics as the thing that implements the bitmask clear operation.
SPARC also has an "andn" instruction with this semantics.

-- 
Chris Metcalf, EZChip Semiconductor
http://www.ezchip.com

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